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From: Blue Swirl <blauwirbel@gmail.com>
Date: Fri, 12 Feb 2010 22:10:01 +0200
Message-ID: <f43fc5581002121210u6e759fb9l25e6ac5342572c84@mail.gmail.com>
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Subject: [Qemu-devel] Re: [PATCH] pci: introduce get_info_quirk callback.
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To: Isaku Yamahata <yamahata@valinux.co.jp>
Cc: qemu-devel@nongnu.org, "Michael S. Tsirkin" <mst@redhat.com>

On Fri, Feb 12, 2010 at 3:34 PM, Isaku Yamahata <yamahata@valinux.co.jp> wrote:
> On Fri, Feb 12, 2010 at 02:54:59PM +0200, Michael S. Tsirkin wrote:
>> On Fri, Feb 12, 2010 at 11:31:34AM +0900, Isaku Yamahata wrote:
>> > This patch fixes 525e05147d5a3bdc08caa422d108c1ef71b584b5
>> > by introducing device specific get_info_quirk callback.
>> > It wrongly assumes that pci host bridge class device has
>> > header type of pci-pci bridge. But this isn't always true.
>> > In fact i440fx pci host bridge has header type of normal device,
>> > hence it breaks i440fx and other pci host bridges.
>> > The right fix is that header type should be checked, instead of device class.
>> >
>> > The change set's purpose is to show PBM pci host bridge
>> > info which doesn't conform to PCI specification.
>>
>> So, PBM has header type PCI_HEADER_TYPE_NORMAL
>> but all config space is in bridge format?
>
> Some of registers is in bridge format.
> To be honest, I don't know whether all or some.
> Blue seems to want bus numbers registers at least.
>
> http://lists.gnu.org/archive/html/qemu-devel/2010-02/msg00519.html

I'm not so sure anymore, I'll have to check this in the weekend.
Perhaps there was some other problem with bus numbering or OpenBIOS
PCI programming which resulted in the need to program PRIMARY/
SECONDARY/SUBORDINATE bus values for host bridge. Does it make any
sense to use anything other than bus 0 for PCI bus attached to host
bridge?