qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Cc: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>,
	Markus Armbruster <armbru@redhat.com>
Subject: Re: [PATCH 17/18] target/mips: Make MIPS_CPU common to new MIPS32_CPU / MIPS64_CPU types
Date: Fri, 15 Mar 2024 13:22:50 +0100	[thread overview]
Message-ID: <f46958e5-01e3-4d88-9d76-00af9d30f110@linaro.org> (raw)
In-Reply-To: <8d30ccda-5b81-42fd-b36c-79bbaceffa2a@linaro.org>

On 13/10/23 06:34, Richard Henderson wrote:
> On 10/10/23 02:28, Philippe Mathieu-Daudé wrote:
>> "target/foo/cpu-qom.h" can not use any target specific definitions.
>>
>> Currently "target/mips/cpu-qom.h" defines TYPE_MIPS_CPU depending
>> on the mips(32)/mips64 build type. This doesn't scale in a
>> heterogeneous context where we need to access both types concurrently.
>>
>> In order to do that, introduce the new MIPS32_CPU / MIPS64_CPU types,
>> both inheriting a common TYPE_MIPS_CPU base type.
>>
>> Keep the current CPU types registered in mips_register_cpudef_type()
>> as 32 or 64-bit, but instead of depending on the binary built being
>> targeting 32/64-bit, check whether the CPU is 64-bit by looking at
>> the CPU_MIPS64 bit.
>>
>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>> ---
>>   target/mips/cpu-qom.h | 13 ++++++-------
>>   target/mips/cpu.h     |  3 +++
>>   target/mips/cpu.c     | 11 ++++++++++-
>>   3 files changed, 19 insertions(+), 8 deletions(-)
>>
>> diff --git a/target/mips/cpu-qom.h b/target/mips/cpu-qom.h
>> index 9c98ca1956..1a71509b5e 100644
>> --- a/target/mips/cpu-qom.h
>> +++ b/target/mips/cpu-qom.h
>> @@ -1,5 +1,5 @@
>>   /*
>> - * QEMU MIPS CPU
>> + * QEMU MIPS CPU QOM header (target agnostic)
>>    *
>>    * Copyright (c) 2012 SUSE LINUX Products GmbH
>>    *
>> @@ -23,13 +23,12 @@
>>   #include "hw/core/cpu.h"
>>   #include "qom/object.h"
>> -#ifdef TARGET_MIPS64
>> -#define TYPE_MIPS_CPU "mips64-cpu"
>> -#else
>> -#define TYPE_MIPS_CPU "mips-cpu"
>> -#endif
>> +#define TYPE_MIPS_CPU   "mips-cpu"
>> +#define TYPE_MIPS32_CPU "mips32-cpu"
>> +#define TYPE_MIPS64_CPU "mips64-cpu"
>> -OBJECT_DECLARE_CPU_TYPE(MIPSCPU, MIPSCPUClass, MIPS_CPU)
>> +OBJECT_DECLARE_CPU_TYPE(MIPS32CPU, MIPSCPUClass, MIPS32_CPU)
>> +OBJECT_DECLARE_CPU_TYPE(MIPS64CPU, MIPSCPUClass, MIPS64_CPU)
>>   #define MIPS_CPU_TYPE_SUFFIX "-" TYPE_MIPS_CPU
>>   #define MIPS_CPU_TYPE_NAME(model) model MIPS_CPU_TYPE_SUFFIX
>> diff --git a/target/mips/cpu.h b/target/mips/cpu.h
>> index 6b026e6bcf..3b6d0a7a8a 100644
>> --- a/target/mips/cpu.h
>> +++ b/target/mips/cpu.h
>> @@ -10,6 +10,9 @@
>>   #include "hw/clock.h"
>>   #include "mips-defs.h"
>> +/* Abstract QOM MIPS CPU, not exposed to other targets */
>> +OBJECT_DECLARE_CPU_TYPE(MIPSCPU, MIPSCPUClass, MIPS_CPU)
> 
> Why is this one moved back to cpu.h?
> You exposed TYPE_X86_CPU in i386/cpu-qom.h...

First thinking was to expose the base TYPE, so we can use QOM methods
to enumerate implementations, but not expose QOM state/class getter
for the base type (except in target/foo/). HW would use concrete
32 or 64b type state/class getter. I might be wrong, so I'll keep
the base type exposed for now. We might restrict later.


  reply	other threads:[~2024-03-15 12:23 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-10  9:28 [PATCH 00/18] target: Make 'cpu-qom.h' really target agnostic Philippe Mathieu-Daudé
2023-10-10  9:28 ` [PATCH 01/18] target: Mention 'cpu-qom.h' is " Philippe Mathieu-Daudé
2023-10-13  3:55   ` Richard Henderson
2023-10-10  9:28 ` [PATCH 02/18] target/ppc: Remove CPU_RESOLVING_TYPE from 'cpu-qom.h' Philippe Mathieu-Daudé
2023-10-13  3:55   ` Richard Henderson
2023-10-10  9:28 ` [PATCH 03/18] target/riscv: " Philippe Mathieu-Daudé
2023-10-10 11:36   ` LIU Zhiwei
2023-10-13  3:57   ` Richard Henderson
2023-10-10  9:28 ` [PATCH 04/18] target: Declare FOO_CPU_TYPE_NAME/SUFFIX in 'cpu-qom.h' Philippe Mathieu-Daudé
2023-10-11  2:51   ` LIU Zhiwei
2023-10-11  3:21     ` Philippe Mathieu-Daudé
2023-10-11  6:12       ` LIU Zhiwei
2023-10-13  4:02   ` Richard Henderson
2023-10-10  9:28 ` [PATCH 05/18] target/hexagon: Declare QOM definitions " Philippe Mathieu-Daudé
2023-10-13  4:06   ` Richard Henderson
2023-10-13  9:18     ` Philippe Mathieu-Daudé
2023-10-10  9:28 ` [PATCH 06/18] target/loongarch: " Philippe Mathieu-Daudé
2023-10-10 11:33   ` gaosong
2023-10-10  9:28 ` [PATCH 07/18] target/nios2: " Philippe Mathieu-Daudé
2023-10-10  9:28 ` [PATCH 08/18] target/openrisc: " Philippe Mathieu-Daudé
2023-10-10  9:28 ` [PATCH 09/18] target/i386: Inline target specific TARGET_DEFAULT_CPU_TYPE definition Philippe Mathieu-Daudé
2023-10-13  4:09   ` Richard Henderson
2023-10-10  9:28 ` [PATCH 10/18] target/riscv: Inline target specific TYPE_RISCV_CPU_BASE definition Philippe Mathieu-Daudé
2023-10-10 11:33   ` LIU Zhiwei
2023-10-11  0:46   ` Alistair Francis
2023-10-13  4:13   ` Richard Henderson
2023-10-13 13:58     ` Philippe Mathieu-Daudé
2023-10-10  9:28 ` [PATCH 11/18] target/i386: Declare CPU QOM types using DEFINE_TYPES() macro Philippe Mathieu-Daudé
2023-10-13  4:17   ` Richard Henderson
2023-10-10  9:28 ` [PATCH 12/18] target/mips: " Philippe Mathieu-Daudé
2023-10-13  4:18   ` Richard Henderson
2023-10-10  9:28 ` [PATCH 13/18] target/ppc: " Philippe Mathieu-Daudé
2023-10-13  4:20   ` Richard Henderson
2023-10-10  9:28 ` [PATCH 14/18] target/sparc: " Philippe Mathieu-Daudé
2023-10-13  4:21   ` Richard Henderson
2023-10-13 18:25   ` Mark Cave-Ayland
2023-10-10  9:28 ` [PATCH 15/18] cpus: Open code OBJECT_DECLARE_TYPE() in OBJECT_DECLARE_CPU_TYPE() Philippe Mathieu-Daudé
2023-10-13  4:27   ` Richard Henderson
2023-10-13 12:47     ` Richard Henderson
2023-10-10  9:28 ` [PATCH 16/18] target/i386: Make X86_CPU common to new I386_CPU / X86_64_CPU types Philippe Mathieu-Daudé
2023-10-13  4:31   ` Richard Henderson
2023-10-10  9:28 ` [PATCH 17/18] target/mips: Make MIPS_CPU common to new MIPS32_CPU / MIPS64_CPU types Philippe Mathieu-Daudé
2023-10-13  4:34   ` Richard Henderson
2024-03-15 12:22     ` Philippe Mathieu-Daudé [this message]
2025-03-25 15:20       ` Philippe Mathieu-Daudé
2023-10-10  9:29 ` [PATCH 18/18] target/sparc: Make SPARC_CPU common to new SPARC32_CPU/SPARC64_CPU types Philippe Mathieu-Daudé
2023-10-13 18:28   ` Mark Cave-Ayland

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=f46958e5-01e3-4d88-9d76-00af9d30f110@linaro.org \
    --to=philmd@linaro.org \
    --cc=armbru@redhat.com \
    --cc=manos.pitsidianakis@linaro.org \
    --cc=qemu-devel@nongnu.org \
    --cc=richard.henderson@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).