From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Lu Gao <lu.gao@verisilicon.com>, qemu-devel@nongnu.org
Cc: Jianxian Wen <jianxian.wen@verisilicon.com>,
Bin Meng <bin.meng@windriver.com>,
"open list:SD (Secure Card)" <qemu-block@nongnu.org>
Subject: Re: [PATCH v2] hw/sd/sdhci: Block Size Register bits [14:12] is lost
Date: Mon, 25 Sep 2023 18:24:04 +0200 [thread overview]
Message-ID: <f5a909cb-609d-0329-672e-3f6f089c75d9@linaro.org> (raw)
In-Reply-To: <20230922020312.30828-1-lu.gao@verisilicon.com>
On 22/9/23 04:03, Lu Gao wrote:
> Block Size Register bits [14:12] is SDMA Buffer Boundary, it is missed
> in register write, but it is needed in SDMA transfer. e.g. it will be
> used in sdhci_sdma_transfer_multi_blocks to calculate boundary_ variables.
>
> Missing this field will cause wrong operation for different SDMA Buffer
> Boundary settings.
>
> Fixes: d7dfca0807 ("hw/sdhci: introduce standard SD host controller")
> Fixes: dfba99f17f ("hw/sdhci: Fix DMA Transfer Block Size field")
>
> Signed-off-by: Lu Gao <lu.gao@verisilicon.com>
> Signed-off-by: Jianxian Wen <jianxian.wen@verisilicon.com>
> Reviewed-by: Philippe Mathieu-Daudé? <f4bug@amsat.org>
> ---
> v2:
> - Add fixes information and reviewed-by information
>
> hw/sd/sdhci.c | 15 +++++++++++----
> 1 file changed, 11 insertions(+), 4 deletions(-)
Thank you, queued (pull request will be next week).
next prev parent reply other threads:[~2023-09-25 16:24 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-22 2:03 [PATCH v2] hw/sd/sdhci: Block Size Register bits [14:12] is lost Lu Gao
2023-09-25 16:24 ` Philippe Mathieu-Daudé [this message]
2023-10-21 7:36 ` Michael Tokarev
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