From: Richard Henderson <richard.henderson@linaro.org>
To: Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com,
bmeng@tinylab.org, liwei1518@gmail.com,
zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com,
max.chou@sifive.com
Subject: Re: [PATCH v4 1/6] trans_rvv.c.inc: mark_vs_dirty() before loads and stores
Date: Tue, 20 Feb 2024 13:49:56 -1000 [thread overview]
Message-ID: <f5d3ea8b-8aa5-4ee5-b895-67eec6d140ee@linaro.org> (raw)
In-Reply-To: <20240220222510.209448-2-dbarboza@ventanamicro.com>
On 2/20/24 12:25, Daniel Henrique Barboza wrote:
> While discussing a problem with how we're (not) setting vstart_eq_zero
> Richard had the following to say w.r.t the conditional mark_vs_dirty()
> calls on load/store functions [1]:
>
> "I think it's required to have stores set dirty unconditionally, before
> the operation.
>
> Consider a store that traps on the 2nd element, leaving vstart = 2, and
> exiting to the main loop via exception. The exception enters the kernel
> page fault handler. The kernel may need to fault in the page for the
> process, and in the meantime task switch.
>
> If vs dirty is not already set, the kernel won't know to save vector
> state on task switch."
>
> Do a mark_vs_dirty() before both loads and stores.
>
> [1]https://lore.kernel.org/qemu-riscv/72c7503b-0f43-44b8-aa82-fbafed2aac0c@linaro.org/
>
> Suggested-by: Richard Henderson<richard.henderson@linaro.org>
> Signed-off-by: Daniel Henrique Barboza<dbarboza@ventanamicro.com>
> ---
> target/riscv/insn_trans/trans_rvv.c.inc | 23 ++++++++---------------
> 1 file changed, 8 insertions(+), 15 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2024-02-20 23:50 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-20 22:25 [PATCH v4 0/6] riscv: set vstart_eq_zero on mark_vs_dirty Daniel Henrique Barboza
2024-02-20 22:25 ` [PATCH v4 1/6] trans_rvv.c.inc: mark_vs_dirty() before loads and stores Daniel Henrique Barboza
2024-02-20 23:49 ` Richard Henderson [this message]
2024-02-20 22:25 ` [PATCH v4 2/6] trans_rvv.c.inc: remove 'is_store' bool from load/store fns Daniel Henrique Barboza
2024-02-20 23:50 ` Richard Henderson
2024-02-20 22:25 ` [PATCH v4 3/6] target/riscv: remove 'over' brconds from vector trans Daniel Henrique Barboza
2024-02-20 23:54 ` Richard Henderson
2024-02-20 22:25 ` [PATCH v4 4/6] target/riscv/vector_helper.c: set vstart = 0 in GEN_VEXT_VSLIDEUP_VX() Daniel Henrique Barboza
2024-02-20 22:25 ` [PATCH v4 5/6] trans_rvv.c.inc: remove redundant mark_vs_dirty() calls Daniel Henrique Barboza
2024-02-20 22:25 ` [PATCH v4 6/6] target/riscv: Clear vstart_qe_zero flag Daniel Henrique Barboza
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