* [Qemu-devel] [PATCH] pci_bridge: fix a typo in comment
@ 2018-11-08 12:21 Mao Zhongyi
2018-11-08 13:12 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 7+ messages in thread
From: Mao Zhongyi @ 2018-11-08 12:21 UTC (permalink / raw)
To: qemu-devel; +Cc: marcel.apfelbaum, mst, Mao Zhongyi
Signed-off-by: Mao Zhongyi <maozhongyi@cmss.chinamobile.com>
---
hw/pci/pci_bridge.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c
index ee9dff2d3a..da8daa3ff2 100644
--- a/hw/pci/pci_bridge.c
+++ b/hw/pci/pci_bridge.c
@@ -310,7 +310,7 @@ void pci_bridge_reset(DeviceState *qdev)
/*
* the default values for base/limit registers aren't specified
- * in the PCI-to-PCI-bridge spec. So we don't thouch them here.
+ * in the PCI-to-PCI-bridge spec. So we don't touch them here.
* Each implementation can override it.
* typical implementation does
* zero base/limit registers or
--
2.17.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [Qemu-devel] [PATCH] pci_bridge: fix a typo in comment
2018-11-08 12:21 [Qemu-devel] [PATCH] pci_bridge: fix a typo in comment Mao Zhongyi
@ 2018-11-08 13:12 ` Philippe Mathieu-Daudé
2019-10-23 3:32 ` maozy
0 siblings, 1 reply; 7+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-11-08 13:12 UTC (permalink / raw)
To: Mao Zhongyi, qemu-devel
Cc: mst, qemu-trivial@nongnu.org >> QEMU Trivial
Cc'ing qemu-trivial@
On 8/11/18 13:21, Mao Zhongyi wrote:
> Signed-off-by: Mao Zhongyi <maozhongyi@cmss.chinamobile.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> ---
> hw/pci/pci_bridge.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c
> index ee9dff2d3a..da8daa3ff2 100644
> --- a/hw/pci/pci_bridge.c
> +++ b/hw/pci/pci_bridge.c
> @@ -310,7 +310,7 @@ void pci_bridge_reset(DeviceState *qdev)
>
> /*
> * the default values for base/limit registers aren't specified
> - * in the PCI-to-PCI-bridge spec. So we don't thouch them here.
> + * in the PCI-to-PCI-bridge spec. So we don't touch them here.
> * Each implementation can override it.
> * typical implementation does
> * zero base/limit registers or
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [PATCH] pci_bridge: fix a typo in comment
2018-11-08 13:12 ` Philippe Mathieu-Daudé
@ 2019-10-23 3:32 ` maozy
2019-10-23 10:47 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 7+ messages in thread
From: maozy @ 2019-10-23 3:32 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: qemu-trivial@nongnu.org >> QEMU Trivial, mst
ping...
On 11/8/18 9:12 PM, Philippe Mathieu-Daudé wrote:
> Cc'ing qemu-trivial@
>
> On 8/11/18 13:21, Mao Zhongyi wrote:
>> Signed-off-by: Mao Zhongyi <maozhongyi@cmss.chinamobile.com>
>
> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
>
>> ---
>> hw/pci/pci_bridge.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c
>> index ee9dff2d3a..da8daa3ff2 100644
>> --- a/hw/pci/pci_bridge.c
>> +++ b/hw/pci/pci_bridge.c
>> @@ -310,7 +310,7 @@ void pci_bridge_reset(DeviceState *qdev)
>> /*
>> * the default values for base/limit registers aren't specified
>> - * in the PCI-to-PCI-bridge spec. So we don't thouch them here.
>> + * in the PCI-to-PCI-bridge spec. So we don't touch them here.
>> * Each implementation can override it.
>> * typical implementation does
>> * zero base/limit registers or
>>
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [PATCH] pci_bridge: fix a typo in comment
2019-10-23 3:32 ` maozy
@ 2019-10-23 10:47 ` Philippe Mathieu-Daudé
2019-10-24 17:25 ` Laurent Vivier
0 siblings, 1 reply; 7+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-10-23 10:47 UTC (permalink / raw)
To: maozy, qemu-devel; +Cc: QEMU Trivial, mst
On 10/23/19 5:32 AM, maozy wrote:
> ping...
I'm not sure qemu-trivial@ received this one because the email address
looked odd (now fixed).
>
> On 11/8/18 9:12 PM, Philippe Mathieu-Daudé wrote:
>> Cc'ing qemu-trivial@
>>
>> On 8/11/18 13:21, Mao Zhongyi wrote:
>>> Signed-off-by: Mao Zhongyi <maozhongyi@cmss.chinamobile.com>
>>
>> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
>>
>>> ---
>>> hw/pci/pci_bridge.c | 2 +-
>>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c
>>> index ee9dff2d3a..da8daa3ff2 100644
>>> --- a/hw/pci/pci_bridge.c
>>> +++ b/hw/pci/pci_bridge.c
>>> @@ -310,7 +310,7 @@ void pci_bridge_reset(DeviceState *qdev)
>>> /*
>>> * the default values for base/limit registers aren't specified
>>> - * in the PCI-to-PCI-bridge spec. So we don't thouch them here.
>>> + * in the PCI-to-PCI-bridge spec. So we don't touch them here.
>>> * Each implementation can override it.
>>> * typical implementation does
>>> * zero base/limit registers or
>>>
>>
>
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [PATCH] pci_bridge: fix a typo in comment
2019-10-23 10:47 ` Philippe Mathieu-Daudé
@ 2019-10-24 17:25 ` Laurent Vivier
0 siblings, 0 replies; 7+ messages in thread
From: Laurent Vivier @ 2019-10-24 17:25 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, maozy, qemu-devel; +Cc: QEMU Trivial, mst
Le 23/10/2019 à 12:47, Philippe Mathieu-Daudé a écrit :
> On 10/23/19 5:32 AM, maozy wrote:
>> ping...
>
> I'm not sure qemu-trivial@ received this one because the email address
> looked odd (now fixed).
>
>>
>> On 11/8/18 9:12 PM, Philippe Mathieu-Daudé wrote:
>>> Cc'ing qemu-trivial@
>>>
>>> On 8/11/18 13:21, Mao Zhongyi wrote:
>>>> Signed-off-by: Mao Zhongyi <maozhongyi@cmss.chinamobile.com>
>>>
>>> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
>>>
>>>> ---
>>>> hw/pci/pci_bridge.c | 2 +-
>>>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>>>
>>>> diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c
>>>> index ee9dff2d3a..da8daa3ff2 100644
>>>> --- a/hw/pci/pci_bridge.c
>>>> +++ b/hw/pci/pci_bridge.c
>>>> @@ -310,7 +310,7 @@ void pci_bridge_reset(DeviceState *qdev)
>>>> /*
>>>> * the default values for base/limit registers aren't specified
>>>> - * in the PCI-to-PCI-bridge spec. So we don't thouch them here.
>>>> + * in the PCI-to-PCI-bridge spec. So we don't touch them here.
>>>> * Each implementation can override it.
>>>> * typical implementation does
>>>> * zero base/limit registers or
>>>>
>>>
>>
>>
>
Applied to my trivial-patches branch.
Thanks,
Laurent
^ permalink raw reply [flat|nested] 7+ messages in thread
* [Qemu-devel] [PATCH] pci_bridge: fix a typo in comment
@ 2019-09-09 3:14 Mao Zhongyi
2019-09-09 9:28 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 7+ messages in thread
From: Mao Zhongyi @ 2019-09-09 3:14 UTC (permalink / raw)
To: qemu-devel, qemu-trival; +Cc: Mao Zhongyi, mst
Signed-off-by: Mao Zhongyi <maozhongyi@cmss.chinamobile.com>
---
hw/pci/pci_bridge.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c
index 715b9a4fe6..97967d12eb 100644
--- a/hw/pci/pci_bridge.c
+++ b/hw/pci/pci_bridge.c
@@ -311,7 +311,7 @@ void pci_bridge_reset(DeviceState *qdev)
/*
* the default values for base/limit registers aren't specified
- * in the PCI-to-PCI-bridge spec. So we don't thouch them here.
+ * in the PCI-to-PCI-bridge spec. So we don't touch them here.
* Each implementation can override it.
* typical implementation does
* zero base/limit registers or
--
2.17.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [Qemu-devel] [PATCH] pci_bridge: fix a typo in comment
2019-09-09 3:14 Mao Zhongyi
@ 2019-09-09 9:28 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 7+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-09-09 9:28 UTC (permalink / raw)
To: Mao Zhongyi, qemu-devel, qemu-trival; +Cc: mst
On 9/9/19 5:14 AM, Mao Zhongyi wrote:
> Signed-off-by: Mao Zhongyi <maozhongyi@cmss.chinamobile.com>
> ---
> hw/pci/pci_bridge.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c
> index 715b9a4fe6..97967d12eb 100644
> --- a/hw/pci/pci_bridge.c
> +++ b/hw/pci/pci_bridge.c
> @@ -311,7 +311,7 @@ void pci_bridge_reset(DeviceState *qdev)
>
> /*
> * the default values for base/limit registers aren't specified
> - * in the PCI-to-PCI-bridge spec. So we don't thouch them here.
> + * in the PCI-to-PCI-bridge spec. So we don't touch them here.
> * Each implementation can override it.
> * typical implementation does
> * zero base/limit registers or
>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2019-10-24 18:05 UTC | newest]
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2018-11-08 12:21 [Qemu-devel] [PATCH] pci_bridge: fix a typo in comment Mao Zhongyi
2018-11-08 13:12 ` Philippe Mathieu-Daudé
2019-10-23 3:32 ` maozy
2019-10-23 10:47 ` Philippe Mathieu-Daudé
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