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[174.21.72.5]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-6f8fcfe64f8sm3999198b3a.151.2024.05.26.19.36.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 26 May 2024 19:36:20 -0700 (PDT) Message-ID: Date: Sun, 26 May 2024 19:36:18 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PULL 17/20] target/arm: Do memory type alignment check when translation disabled To: Bernhard Beschow , qemu-devel@nongnu.org, Peter Maydell References: <20240305135237.3111642-1-peter.maydell@linaro.org> <20240305135237.3111642-18-peter.maydell@linaro.org> <72ED7A80-9EA7-4FF6-BE29-9583587985C7@gmail.com> Content-Language: en-US From: Richard Henderson In-Reply-To: <72ED7A80-9EA7-4FF6-BE29-9583587985C7@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::435; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 5/25/24 13:50, Bernhard Beschow wrote: > > > Am 25. Mai 2024 13:41:54 UTC schrieb Bernhard Beschow : >> >> >> Am 5. März 2024 13:52:34 UTC schrieb Peter Maydell : >>> From: Richard Henderson >>> >>> If translation is disabled, the default memory type is Device, which >>> requires alignment checking. This is more optimally done early via >>> the MemOp given to the TCG memory operation. >>> >>> Reviewed-by: Philippe Mathieu-Daudé >>> Reported-by: Idan Horowitz >>> Signed-off-by: Richard Henderson >>> Message-id: 20240301204110.656742-6-richard.henderson@linaro.org >>> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1204 >>> Signed-off-by: Richard Henderson >>> Signed-off-by: Peter Maydell >> >> Hi, >> >> This change causes an old 4.14.40 Linux kernel to panic on boot using the sabrelite machine: >> >> [snip] >> Alignment trap: init (1) PC=0x76f1e3d4 Instr=0x14913004 Address=0x76f34f3e FSR 0x001 >> Alignment trap: init (1) PC=0x76f1e3d8 Instr=0x148c3004 Address=0x7e8492bd FSR 0x801 >> Alignment trap: init (1) PC=0x76f0dab0 Instr=0x6823 Address=0x7e849fbb FSR 0x001 >> Alignment trap: init (1) PC=0x76f0dab2 Instr=0x6864 Address=0x7e849fbf FSR 0x001 >> scsi 0:0:0:0: Direct-Access QEMU QEMU HARDDISK 2.5+ PQ: 0 ANSI: 5 >> fsl-asoc-card sound: ASoC: CODEC DAI sgtl5000 not registered >> imx-sgtl5000 sound: ASoC: CODEC DAI sgtl5000 not registered >> imx-sgtl5000 sound: snd_soc_register_card failed (-517) >> Alignment trap: init (1) PC=0x76eac95a Instr=0xf8dd5015 Address=0x7e849b05 FSR 0x001 >> Alignment trap: not handling instruction f8dd5015 at [<76eac95a>] >> Unhandled fault: alignment exception (0x001) at 0x7e849b05 >> pgd = 9c59c000 >> [7e849b05] *pgd=2c552831, *pte=109eb34f, *ppte=109eb83f >> Kernel panic - not syncing: Attempted to kill init! exitcode=0x00000007 >> >> ---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x00000007 >> >> As you can see, some alignment exceptions are handled by the kernel, the last one isn't. I added some additional printk()'s and traced it down to this location in the kernel: which claims that ARMv6++ CPUs can handle up to word-sized unaligned accesses, thus no fixup is needed. >> >> I hope that this will be sufficient for a fix. Let me know if you need any additional information. > > I'm performing a direct kernel boot. On real hardware, a bootloader is involved which probably enables unaligned access. This may explain why it works there but not in QEMU any longer. > > To fix direct kernel boot, it seems as if the "built-in bootloader" would need to be adapted/extended [1]. Any ideas? I strongly suspect a kernel bug. Either mmu disabled or attempting unaligned access on pages mapped as Device instead of Normal. r~