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Tue, 13 Apr 2021 18:10:14 -0700 (PDT) Received: from [192.168.1.11] ([71.212.131.83]) by smtp.gmail.com with ESMTPSA id b1sm16592726pgf.84.2021.04.13.18.10.13 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 13 Apr 2021 18:10:13 -0700 (PDT) Subject: Re: [PATCH] decodetree: Allow custom var width load functions To: Luis Pires , qemu-devel@nongnu.org References: <20210413181615.414685-1-luis.pires@eldorado.org.br> From: Richard Henderson Message-ID: Date: Tue, 13 Apr 2021 18:10:11 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.1 MIME-Version: 1.0 In-Reply-To: <20210413181615.414685-1-luis.pires@eldorado.org.br> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::433; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 4/13/21 11:16 AM, Luis Pires wrote: > This is useful in situations where you want decodetree > to handle variable width instructions but you want to > provide custom code to load the instructions. Suppressing > the generation of the load function is necessary to avoid > compilation errors due to the load function being unused. > > This will be used by the PowerPC decodetree code. > > Signed-off-by: Luis Pires > --- > scripts/decodetree.py | 18 +++++++++++------- > 1 file changed, 11 insertions(+), 7 deletions(-) So, in the previous cases where we have very controlled "variable length", we've simply created separate decode files each with fixed length. E.g. for arm thumb, in thumb_tr_translate_insn: insn = arm_lduw_code(env, dc->base.pc_next, dc->sctlr_b); is_16bit = thumb_insn_is_16bit(dc, dc->base.pc_next, insn); ... if (is_16bit) { disas_thumb_insn(dc, insn); } else { disas_thumb2_insn(dc, insn); } Similarly, riscv's decode_opc. I would think that Power would work the same, with 32-bit and 64-bit instructions. I'd like you to talk me through what you want to do here. r~