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Fri, 10 Mar 2023 19:34:11 +0000 (GMT) Message-ID: Subject: Re: [PATCH 01/12] target/s390x: Handle branching to odd addresses From: Ilya Leoshkevich To: Richard Henderson , David Hildenbrand Cc: Thomas Huth , qemu-s390x@nongnu.org, qemu-devel@nongnu.org, Harold Grovesteen , Nina Schoetterl-Glausch Date: Fri, 10 Mar 2023 20:34:10 +0100 In-Reply-To: References: <20230310174223.944843-1-iii@linux.ibm.com> <20230310174223.944843-2-iii@linux.ibm.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.46.4 (3.46.4-1.fc37) MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: GaDKyTsCe2E_KRensMuoGqePT3YFc6-l X-Proofpoint-GUID: BJR5qB2_PvZSOKvTZHwWuZA98ovDw4pO X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-10_10,2023-03-10_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 malwarescore=0 adultscore=0 lowpriorityscore=0 bulkscore=0 priorityscore=1501 impostorscore=0 spamscore=0 clxscore=1015 mlxlogscore=556 suspectscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2303100155 Received-SPF: pass client-ip=148.163.156.1; envelope-from=iii@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Fri, 2023-03-10 at 11:24 -0800, Richard Henderson wrote: > On 3/10/23 09:42, Ilya Leoshkevich wrote: > > @@ -381,6 +382,14 @@ static inline int cpu_mmu_index(CPUS390XState > > *env, bool ifetch) > > =C2=A0 static inline void cpu_get_tb_cpu_state(CPUS390XState* env, > > target_ulong *pc, > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0 target_ulong *cs_base, > > uint32_t *flags) > > =C2=A0 { > > +=C2=A0=C2=A0=C2=A0 if (env->psw.addr & 1) { > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 /* > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 * Instructions must b= e at even addresses. > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 * This needs to be ch= ecked before address translation. > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 */ > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 env->int_pgm_ilen =3D 2; /*= see s390_cpu_tlb_fill() */ > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 tcg_s390_program_interrupt(= env, PGM_SPECIFICATION, 0); > > +=C2=A0=C2=A0=C2=A0 } >=20 > This is incorrect placement.=C2=A0 You can't raise an exception from all > of the places from=20 > which this is called. >=20 > You need to do this at the start of s390x_tr_translate_insn. > Compare aarch64_tr_translate_insn and the test for (pc & 3). >=20 >=20 > r~ The problem is that it's too late - for non-mapped memory we would get a translation exception instead of a specification exception. I see the following call sites: - HELPER(lookup_tb_ptr) - for helpers the exceptions should work; - cpu_exec_loop(), cpu_exec_step_atomic - these are wrapped in setjmp, so it should be ok too? - tb_check_watchpoint() - is this the problematic one? Am I missing something?