From: Richard Henderson <richard.henderson@linaro.org>
To: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>, qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, palmer@dabbelt.com,
alistair.francis@wdc.com, dbarboza@ventanamicro.com,
liwei1518@gmail.com, bmeng.cn@gmail.com,
TANG Tiancheng <tangtiancheng.ttc@alibaba-inc.com>
Subject: Re: [PATCH v2 10/14] tcg/riscv: Implement vector sat/mul ops
Date: Tue, 3 Sep 2024 07:52:51 -0700 [thread overview]
Message-ID: <f78a75e9-0ed5-4b0e-ad38-54f4541c4e7d@linaro.org> (raw)
In-Reply-To: <20240830061607.1940-11-zhiwei_liu@linux.alibaba.com>
On 8/29/24 23:16, LIU Zhiwei wrote:
> From: TANG Tiancheng<tangtiancheng.ttc@alibaba-inc.com>
>
> Signed-off-by: TANG Tiancheng<tangtiancheng.ttc@alibaba-inc.com>
> Reviewed-by: Liu Zhiwei<zhiwei_liu@linux.alibaba.com>
> ---
> tcg/riscv/tcg-target.c.inc | 36 ++++++++++++++++++++++++++++++++++++
> tcg/riscv/tcg-target.h | 4 ++--
> 2 files changed, 38 insertions(+), 2 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2024-09-03 14:53 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-30 6:15 [PATCH v2 00/14] tcg/riscv: Add support for vector LIU Zhiwei
2024-08-30 6:15 ` [PATCH v2 01/14] tcg/op-gvec: Fix iteration step in 32-bit operation LIU Zhiwei
2024-08-31 23:59 ` Richard Henderson
2024-08-30 6:15 ` [PATCH v2 02/14] util: Add RISC-V vector extension probe in cpuinfo LIU Zhiwei
2024-09-02 0:12 ` Richard Henderson
2024-08-30 6:15 ` [PATCH v2 03/14] tcg/riscv: Add basic support for vector LIU Zhiwei
2024-09-02 0:28 ` Richard Henderson
2024-08-30 6:15 ` [PATCH v2 04/14] tcg/riscv: Add riscv vset{i}vli support LIU Zhiwei
2024-09-02 1:06 ` Richard Henderson
2024-08-30 6:15 ` [PATCH v2 05/14] tcg/riscv: Implement vector load/store LIU Zhiwei
2024-09-02 1:31 ` Richard Henderson
2024-08-30 6:15 ` [PATCH v2 06/14] tcg/riscv: Implement vector mov/dup{m/i} LIU Zhiwei
2024-09-02 1:36 ` Richard Henderson
2024-08-30 6:16 ` [PATCH v2 07/14] tcg/riscv: Add support for basic vector opcodes LIU Zhiwei
2024-09-02 1:39 ` Richard Henderson
2024-08-30 6:16 ` [PATCH v2 08/14] tcg/riscv: Implement vector cmp ops LIU Zhiwei
2024-09-03 6:45 ` Richard Henderson
2024-09-03 14:51 ` Richard Henderson
2024-08-30 6:16 ` [PATCH v2 09/14] tcg/riscv: Implement vector neg ops LIU Zhiwei
2024-09-03 14:52 ` Richard Henderson
2024-08-30 6:16 ` [PATCH v2 10/14] tcg/riscv: Implement vector sat/mul ops LIU Zhiwei
2024-09-03 14:52 ` Richard Henderson [this message]
2024-08-30 6:16 ` [PATCH v2 11/14] tcg/riscv: Implement vector min/max ops LIU Zhiwei
2024-09-03 14:53 ` Richard Henderson
2024-08-30 6:16 ` [PATCH v2 12/14] tcg/riscv: Implement vector shs/v ops LIU Zhiwei
2024-09-03 14:54 ` Richard Henderson
2024-08-30 6:16 ` [PATCH v2 13/14] tcg/riscv: Implement vector roti/v/x shi ops LIU Zhiwei
2024-09-03 15:15 ` Richard Henderson
2024-09-04 15:25 ` LIU Zhiwei
2024-09-04 19:05 ` Richard Henderson
2024-09-05 1:40 ` LIU Zhiwei
2024-08-30 6:16 ` [PATCH v2 14/14] tcg/riscv: Enable native vector support for TCG host LIU Zhiwei
2024-09-03 15:02 ` Richard Henderson
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