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[174.21.71.127]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2f7ffb193e1sm5644337a91.42.2025.01.26.13.14.44 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 26 Jan 2025 13:14:44 -0800 (PST) Message-ID: Date: Sun, 26 Jan 2025 13:14:43 -0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 15/20] cpus: Fix style in cpu-target.c To: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org Cc: Peter Maydell , Paolo Bonzini , qemu-arm@nongnu.org, Igor Mammedov , =?UTF-8?Q?Alex_Benn=C3=A9e?= , kvm@vger.kernel.org, qemu-ppc@nongnu.org, qemu-riscv@nongnu.org, David Hildenbrand , qemu-s390x@nongnu.org, xen-devel@lists.xenproject.org References: <20250123234415.59850-1-philmd@linaro.org> <20250123234415.59850-16-philmd@linaro.org> Content-Language: en-US From: Richard Henderson In-Reply-To: <20250123234415.59850-16-philmd@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::102c; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 1/23/25 15:44, Philippe Mathieu-Daudé wrote: > Fix style on code we are going to modify. > > Signed-off-by: Philippe Mathieu-Daudé > --- > cpu-target.c | 9 ++++++--- > 1 file changed, 6 insertions(+), 3 deletions(-) > > diff --git a/cpu-target.c b/cpu-target.c > index 6d8b7825746..a2999e7c3c0 100644 > --- a/cpu-target.c > +++ b/cpu-target.c > @@ -47,12 +47,15 @@ static int cpu_common_post_load(void *opaque, int version_id) > { > CPUState *cpu = opaque; > > - /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the > - version_id is increased. */ > + /* > + * 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the > + * version_id is increased. > + */ > cpu->interrupt_request &= ~0x01; > tlb_flush(cpu); > > - /* loadvm has just updated the content of RAM, bypassing the > + /* > + * loadvm has just updated the content of RAM, bypassing the > * usual mechanisms that ensure we flush TBs for writes to > * memory we've translated code from. So we must flush all TBs, > * which will now be stale. Reviewed-by: Richard Henderson r~