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([2a01:c22:b04f:b200:7a70:bbc8:8101:45be]) by smtp.gmail.com with ESMTPSA id h125sm22239737wmf.31.2019.09.29.07.35.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 29 Sep 2019 07:35:12 -0700 (PDT) Message-ID: Subject: Re: [PATCH 07/14] hw/arm/bcm2835: Add various unimplemented peripherals From: Esteban Bosse To: Philippe =?ISO-8859-1?Q?Mathieu-Daud=E9?= , Peter Maydell , Andrew Baumann , qemu-devel@nongnu.org, Pekka Enberg , =?ISO-8859-1?Q?Zolt=E1n?= Baldaszti Date: Sun, 29 Sep 2019 16:35:02 +0200 In-Reply-To: <20190904171315.8354-8-f4bug@amsat.org> References: <20190904171315.8354-1-f4bug@amsat.org> <20190904171315.8354-8-f4bug@amsat.org> Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.30.5-1.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::443 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-arm@nongnu.org, Clement Deschamps , =?ISO-8859-1?Q?Marc-Andr=E9?= Lureau , Paolo Bonzini , Philippe =?ISO-8859-1?Q?Mathieu-Daud=E9?= , Luc Michel Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" El mié, 04-09-2019 a las 19:13 +0200, Philippe Mathieu-Daudé escribió: > Base addresses and sizes taken from the "BCM2835 ARM Peripherals" > datasheet from February 06 2012: > https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf > > Reviewed-by: Peter Maydell > Signed-off-by: Philippe Mathieu-Daudé > --- > hw/arm/bcm2835_peripherals.c | 30 > ++++++++++++++++++++++++++++ > include/hw/arm/bcm2835_peripherals.h | 14 +++++++++++++ > include/hw/arm/raspi_platform.h | 8 ++++++++ > 3 files changed, 52 insertions(+) > > diff --git a/hw/arm/bcm2835_peripherals.c > b/hw/arm/bcm2835_peripherals.c > index 270357b5a8..be6270b8ef 100644 > --- a/hw/arm/bcm2835_peripherals.c > +++ b/hw/arm/bcm2835_peripherals.c > @@ -22,6 +22,20 @@ > /* Capabilities for SD controller: no DMA, high-speed, default > clocks etc. */ > #define BCM2835_SDHC_CAPAREG 0x52134b4 > > +static void create_unimp(BCM2835PeripheralState *ps, > + UnimplementedDeviceState *uds, > + const char *name, hwaddr ofs, hwaddr size) > +{ > + sysbus_init_child_obj(OBJECT(ps), name, uds, > + sizeof(UnimplementedDeviceState), > + TYPE_UNIMPLEMENTED_DEVICE); > + qdev_prop_set_string(DEVICE(uds), "name", name); > + qdev_prop_set_uint64(DEVICE(uds), "size", size); > + object_property_set_bool(OBJECT(uds), true, "realized", > &error_fatal); > + memory_region_add_subregion(&ps->peri_mr, ofs, > + sysbus_mmio_get_region(SYS_BUS_DEVIC > E(uds), 0)); > +} > + > static void bcm2835_peripherals_init(Object *obj) > { > BCM2835PeripheralState *s = BCM2835_PERIPHERALS(obj); > @@ -322,6 +336,22 @@ static void > bcm2835_peripherals_realize(DeviceState *dev, Error **errp) > error_propagate(errp, err); > return; > } > + > + create_unimp(s, &s->pm, "bcm2835-pm", PM_OFFSET, 0x1000); > + create_unimp(s, &s->cprman, "bcm2835-cprman", CPRMAN_OFFSET, > 0x1000); > + create_unimp(s, &s->a2w, "bcm2835-a2w", 0x102000, 0x1000); > + create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100); > + create_unimp(s, &s->smi, "bcm2835-smi", SMI_OFFSET, 0x100); > + create_unimp(s, &s->spi0, "bcm2835-spi0", SPI0_OFFSET, 0x20); > + create_unimp(s, &s->bscsl, "bcm2835-spis", BSC_SL_OFFSET, > 0x100); > + create_unimp(s, &s->i2c[0], "bcm2835-i2c0", BSC0_OFFSET, 0x20); > + create_unimp(s, &s->i2c[1], "bcm2835-i2c1", BSC1_OFFSET, 0x20); > + create_unimp(s, &s->i2c[2], "bcm2835-i2c2", BSC2_OFFSET, 0x20); > + create_unimp(s, &s->otp, "bcm2835-otp", OTP_OFFSET, 0x80); > + create_unimp(s, &s->dbus, "bcm2835-dbus", DBUS_OFFSET, 0x8000); > + create_unimp(s, &s->ave0, "bcm2835-ave0", AVE0_OFFSET, 0x8000); > + create_unimp(s, &s->dwc2, "dwc-usb2", USB_OTG_OFFSET, 0x100); > + create_unimp(s, &s->sdramc, "bcm2835-sdramc", SDRAMC_OFFSET, > 0x100); > } > > static void bcm2835_peripherals_class_init(ObjectClass *oc, void > *data) > diff --git a/include/hw/arm/bcm2835_peripherals.h > b/include/hw/arm/bcm2835_peripherals.h > index 6b17f6a382..44a182b399 100644 > --- a/include/hw/arm/bcm2835_peripherals.h > +++ b/include/hw/arm/bcm2835_peripherals.h > @@ -23,6 +23,7 @@ > #include "hw/sd/sdhci.h" > #include "hw/sd/bcm2835_sdhost.h" > #include "hw/gpio/bcm2835_gpio.h" > +#include "hw/misc/unimp.h" > > #define TYPE_BCM2835_PERIPHERALS "bcm2835-peripherals" > #define BCM2835_PERIPHERALS(obj) \ > @@ -37,6 +38,9 @@ typedef struct BCM2835PeripheralState { > MemoryRegion ram_alias[4]; > qemu_irq irq, fiq; > > + UnimplementedDeviceState pm; > + UnimplementedDeviceState cprman; > + UnimplementedDeviceState a2w; > PL011State uart0; > BCM2835AuxState aux; > BCM2835FBState fb; > @@ -48,6 +52,16 @@ typedef struct BCM2835PeripheralState { > SDHCIState sdhci; > BCM2835SDHostState sdhost; > BCM2835GpioState gpio; > + UnimplementedDeviceState i2s; > + UnimplementedDeviceState spi0; > + UnimplementedDeviceState i2c[3]; > + UnimplementedDeviceState otp; > + UnimplementedDeviceState dbus; > + UnimplementedDeviceState ave0; > + UnimplementedDeviceState bscsl; > + UnimplementedDeviceState smi; > + UnimplementedDeviceState dwc2; > + UnimplementedDeviceState sdramc; > } BCM2835PeripheralState; > > #endif /* BCM2835_PERIPHERALS_H */ > diff --git a/include/hw/arm/raspi_platform.h > b/include/hw/arm/raspi_platform.h > index 6f7db85bab..069edab526 100644 > --- a/include/hw/arm/raspi_platform.h > +++ b/include/hw/arm/raspi_platform.h > @@ -40,6 +40,7 @@ > #define PM_OFFSET 0x100000 /* Power Management, Reset > controller > * and Watchdog registers > */ > #define CPRMAN_OFFSET 0x101000 /* Clock Management */ > +#define AVS_OFFSET 0x103000 /* Audio Video Standard */ > #define RNG_OFFSET 0x104000 > #define GPIO_OFFSET 0x200000 > #define UART0_OFFSET 0x201000 > @@ -47,11 +48,18 @@ > #define I2S_OFFSET 0x203000 > #define SPI0_OFFSET 0x204000 > #define BSC0_OFFSET 0x205000 /* BSC0 I2C/TWI */ > +#define OTP_OFFSET 0x20f000 > +#define AVSP_OFFSET 0x130000 > +#define BSC_SL_OFFSET 0x214000 /* SPI slave */ > #define AUX_OFFSET 0x215000 /* AUX: UART1/SPI1/SPI2 */ > #define EMMC1_OFFSET 0x300000 > #define SMI_OFFSET 0x600000 > #define BSC1_OFFSET 0x804000 /* BSC1 I2C/TWI */ > +#define BSC2_OFFSET 0x805000 /* BSC2 I2C/TWI */ > +#define DBUS_OFFSET 0x900000 > +#define AVE0_OFFSET 0x910000 > #define USB_OTG_OFFSET 0x980000 /* DTC_OTG USB controller > */ > +#define SDRAMC_OFFSET 0xe00000 > #define DMA15_OFFSET 0xE05000 /* DMA controller, channel > 15 */ > > /* GPU interrupts */ Reviewed-by: Esteban Bosse