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([2602:ae:154a:9f01:cc1c:ced1:1ec5:bd62]) by smtp.gmail.com with ESMTPSA id l10-20020a635b4a000000b004dff15fc121sm266665pgm.36.2023.03.10.11.54.21 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 10 Mar 2023 11:54:21 -0800 (PST) Message-ID: Date: Fri, 10 Mar 2023 11:54:20 -0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.7.1 Subject: Re: [PATCH 01/12] target/s390x: Handle branching to odd addresses Content-Language: en-US To: Ilya Leoshkevich , David Hildenbrand Cc: Thomas Huth , qemu-s390x@nongnu.org, qemu-devel@nongnu.org, Harold Grovesteen , Nina Schoetterl-Glausch References: <20230310174223.944843-1-iii@linux.ibm.com> <20230310174223.944843-2-iii@linux.ibm.com> From: Richard Henderson In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::102d; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 3/10/23 11:34, Ilya Leoshkevich wrote: > On Fri, 2023-03-10 at 11:24 -0800, Richard Henderson wrote: >> On 3/10/23 09:42, Ilya Leoshkevich wrote: >>> @@ -381,6 +382,14 @@ static inline int cpu_mmu_index(CPUS390XState >>> *env, bool ifetch) >>>   static inline void cpu_get_tb_cpu_state(CPUS390XState* env, >>> target_ulong *pc, >>>                                           target_ulong *cs_base, >>> uint32_t *flags) >>>   { >>> +    if (env->psw.addr & 1) { >>> +        /* >>> +         * Instructions must be at even addresses. >>> +         * This needs to be checked before address translation. >>> +         */ >>> +        env->int_pgm_ilen = 2; /* see s390_cpu_tlb_fill() */ >>> +        tcg_s390_program_interrupt(env, PGM_SPECIFICATION, 0); >>> +    } >> >> This is incorrect placement.  You can't raise an exception from all >> of the places from >> which this is called. >> >> You need to do this at the start of s390x_tr_translate_insn. >> Compare aarch64_tr_translate_insn and the test for (pc & 3). >> >> >> r~ > > The problem is that it's too late - for non-mapped memory we would get > a translation exception instead of a specification exception. Ah. I wonder if I've got the placement right for arm. > I see the following call sites: > > - HELPER(lookup_tb_ptr) - for helpers the exceptions should work; > - cpu_exec_loop(), cpu_exec_step_atomic - these are wrapped in setjmp, > so it should be ok too? > - tb_check_watchpoint() - is this the problematic one? > > Am I missing something? Apparently not. I thought the ones except for lookup_tb_ptr would be outside the setjmp, but I was wrong.