[Qemu-devel] [PATCH 00/17] split out piix specific part from pc emulator. v2

[Qemu-devel] [PATCH 00/17] split out piix specific part from pc emulator. v2

[Isaku Yamahata]

This patch series is for spliting out piix specific part from pc emulator
to make it easier to implement other pc chipset emulator.
Although my motivation is for 128+ PCI and another chipset support,
I think this patch series itself is good for readability and maintenance.

thanks,

Changes from v1:
- make patches full bisectable
- typo s/allocte/allocate/
- some minor fixes
- dropped a merged patch

Isaku Yamahata (17):
  acpi.c: split out pc smbus routines from acpi.c into pc_smbus.c
  acpi.c: split out apm register emulation.
  acpi.c: make qemu_system_powerdown() piix independent.
  acpi: add acpi constants from linux header files and use them.
  acpi.c: split acpi.c into the common part and the piix4 part.
  pc.c: Make smm enable/disable function i440fx independent.
  pc.c: remove unnecessary global variables, pit and ioapic..
  pc.c: remove a global variable, floppy_controller.
  pc.c: remove a global variable, RTCState *rtc_state.
  pc.c: introduce a function to allocate cpu irq.
  pc.c: make pc_init1() not refer ferr_irq directly.
  pc.c: split out cpu initialization from pc_init1() into
    pc_cpus_init().
  pc.c: split out memory allocation from pc_init1() into
    pc_memory_init()
  pc.c: split out vga initialization from pc_init1() into
    pc_vga_init().
  pc.c: split out basic device init from pc_init1() into
    pc_basic_device_init()
  pc.c: split out pci device init from pc_init1() into
    pc_pci_device_init()
  pc.c: split out piix specific part from pc.c into pc_piix.c

 Makefile.target |    2 +
 hw/acpi.c       |  732 +------------------------------------------------------
 hw/acpi.h       |   85 +++++++
 hw/acpi_piix4.c |  580 +++++++++++++++++++++++++++++++++++++++++++
 hw/pc.c         |  293 ++++++++---------------
 hw/pc.h         |   34 +++-
 hw/pc_apm.c     |   92 +++++++
 hw/pc_apm.h     |   39 +++
 hw/pc_piix.c    |  210 ++++++++++++++++
 hw/pc_smbus.c   |  178 ++++++++++++++
 hw/pc_smbus.h   |   43 ++++
 hw/piix_pci.c   |    8 +-
 12 files changed, 1375 insertions(+), 921 deletions(-)
 create mode 100644 hw/acpi.h
 create mode 100644 hw/acpi_piix4.c
 create mode 100644 hw/pc_apm.c
 create mode 100644 hw/pc_apm.h
 create mode 100644 hw/pc_piix.c
 create mode 100644 hw/pc_smbus.c
 create mode 100644 hw/pc_smbus.h

[Qemu-devel] [PATCH 01/17] acpi.c: split out pc smbus routines from acpi.c into pc_smbus.c

[Isaku Yamahata]

Split out pc smbus routines from acpi.c into pc_smbus.c and
use it.
The split out smbus emulation will be used later.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
---
 Makefile.target |    2 +
 hw/acpi.c       |  164 +++------------------------------------------------
 hw/pc_smbus.c   |  178 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
 hw/pc_smbus.h   |   43 +++++++++++++
 4 files changed, 231 insertions(+), 156 deletions(-)
 create mode 100644 hw/pc_smbus.c
 create mode 100644 hw/pc_smbus.h

diff --git a/Makefile.target b/Makefile.target
index a593503..28e2edb 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -567,6 +567,7 @@ obj-y += fdc.o mc146818rtc.o serial.o i8259.o i8254.o pcspk.o pc.o
 obj-y += cirrus_vga.o apic.o ioapic.o parallel.o acpi.o piix_pci.o
 obj-y += usb-uhci.o vmmouse.o vmport.o vmware_vga.o hpet.o
 obj-y += device-hotplug.o pci-hotplug.o smbios.o
+obj-y += pc_smbus.o
 CPPFLAGS += -DHAS_AUDIO -DHAS_AUDIO_CHOICE
 endif
 ifeq ($(TARGET_BASE_ARCH), ppc)
@@ -599,6 +600,7 @@ obj-y += mips_timer.o mips_int.o dma.o vga.o serial.o i8254.o i8259.o rc4030.o
 obj-y += g364fb.o jazz_led.o dp8393x.o
 obj-y += ide.o gt64xxx.o pckbd.o fdc.o mc146818rtc.o usb-uhci.o acpi.o ds1225y.o
 obj-y += piix_pci.o parallel.o cirrus_vga.o pcspk.o $(sound-obj-y)
+obj-y += pc_smbus.o
 obj-y += mipsnet.o
 obj-y += pflash_cfi01.o
 obj-y += vmware_vga.o
diff --git a/hw/acpi.c b/hw/acpi.c
index 0465201..8e58c67 100644
--- a/hw/acpi.c
+++ b/hw/acpi.c
@@ -18,6 +18,7 @@
  */
 #include "hw.h"
 #include "pc.h"
+#include "pc_smbus.h"
 #include "pci.h"
 #include "qemu-timer.h"
 #include "sysemu.h"
@@ -41,15 +42,9 @@ typedef struct PIIX4PMState {
     uint8_t apms;
     QEMUTimer *tmr_timer;
     int64_t tmr_overflow_time;
-    i2c_bus *smbus;
-    uint8_t smb_stat;
-    uint8_t smb_ctl;
-    uint8_t smb_cmd;
-    uint8_t smb_addr;
-    uint8_t smb_data0;
-    uint8_t smb_data1;
-    uint8_t smb_data[32];
-    uint8_t smb_index;
+
+    PCSMBus smb;
+
     qemu_irq irq;
 } PIIX4PMState;
 
@@ -67,14 +62,6 @@ typedef struct PIIX4PMState {
 #define ACPI_ENABLE 0xf1
 #define ACPI_DISABLE 0xf0
 
-#define SMBHSTSTS 0x00
-#define SMBHSTCNT 0x02
-#define SMBHSTCMD 0x03
-#define SMBHSTADD 0x04
-#define SMBHSTDAT0 0x05
-#define SMBHSTDAT1 0x06
-#define SMBBLKDAT 0x07
-
 static PIIX4PMState *pm_state;
 
 static uint32_t get_pmtmr(PIIX4PMState *s)
@@ -279,141 +266,6 @@ static void acpi_dbg_writel(void *opaque, uint32_t addr, uint32_t val)
 #endif
 }
 
-static void smb_transaction(PIIX4PMState *s)
-{
-    uint8_t prot = (s->smb_ctl >> 2) & 0x07;
-    uint8_t read = s->smb_addr & 0x01;
-    uint8_t cmd = s->smb_cmd;
-    uint8_t addr = s->smb_addr >> 1;
-    i2c_bus *bus = s->smbus;
-
-#ifdef DEBUG
-    printf("SMBus trans addr=0x%02x prot=0x%02x\n", addr, prot);
-#endif
-    switch(prot) {
-    case 0x0:
-        smbus_quick_command(bus, addr, read);
-        break;
-    case 0x1:
-        if (read) {
-            s->smb_data0 = smbus_receive_byte(bus, addr);
-        } else {
-            smbus_send_byte(bus, addr, cmd);
-        }
-        break;
-    case 0x2:
-        if (read) {
-            s->smb_data0 = smbus_read_byte(bus, addr, cmd);
-        } else {
-            smbus_write_byte(bus, addr, cmd, s->smb_data0);
-        }
-        break;
-    case 0x3:
-        if (read) {
-            uint16_t val;
-            val = smbus_read_word(bus, addr, cmd);
-            s->smb_data0 = val;
-            s->smb_data1 = val >> 8;
-        } else {
-            smbus_write_word(bus, addr, cmd, (s->smb_data1 << 8) | s->smb_data0);
-        }
-        break;
-    case 0x5:
-        if (read) {
-            s->smb_data0 = smbus_read_block(bus, addr, cmd, s->smb_data);
-        } else {
-            smbus_write_block(bus, addr, cmd, s->smb_data, s->smb_data0);
-        }
-        break;
-    default:
-        goto error;
-    }
-    return;
-
-  error:
-    s->smb_stat |= 0x04;
-}
-
-static void smb_ioport_writeb(void *opaque, uint32_t addr, uint32_t val)
-{
-    PIIX4PMState *s = opaque;
-    addr &= 0x3f;
-#ifdef DEBUG
-    printf("SMB writeb port=0x%04x val=0x%02x\n", addr, val);
-#endif
-    switch(addr) {
-    case SMBHSTSTS:
-        s->smb_stat = 0;
-        s->smb_index = 0;
-        break;
-    case SMBHSTCNT:
-        s->smb_ctl = val;
-        if (val & 0x40)
-            smb_transaction(s);
-        break;
-    case SMBHSTCMD:
-        s->smb_cmd = val;
-        break;
-    case SMBHSTADD:
-        s->smb_addr = val;
-        break;
-    case SMBHSTDAT0:
-        s->smb_data0 = val;
-        break;
-    case SMBHSTDAT1:
-        s->smb_data1 = val;
-        break;
-    case SMBBLKDAT:
-        s->smb_data[s->smb_index++] = val;
-        if (s->smb_index > 31)
-            s->smb_index = 0;
-        break;
-    default:
-        break;
-    }
-}
-
-static uint32_t smb_ioport_readb(void *opaque, uint32_t addr)
-{
-    PIIX4PMState *s = opaque;
-    uint32_t val;
-
-    addr &= 0x3f;
-    switch(addr) {
-    case SMBHSTSTS:
-        val = s->smb_stat;
-        break;
-    case SMBHSTCNT:
-        s->smb_index = 0;
-        val = s->smb_ctl & 0x1f;
-        break;
-    case SMBHSTCMD:
-        val = s->smb_cmd;
-        break;
-    case SMBHSTADD:
-        val = s->smb_addr;
-        break;
-    case SMBHSTDAT0:
-        val = s->smb_data0;
-        break;
-    case SMBHSTDAT1:
-        val = s->smb_data1;
-        break;
-    case SMBBLKDAT:
-        val = s->smb_data[s->smb_index++];
-        if (s->smb_index > 31)
-            s->smb_index = 0;
-        break;
-    default:
-        val = 0;
-        break;
-    }
-#ifdef DEBUG
-    printf("SMB readb port=0x%04x val=0x%02x\n", addr, val);
-#endif
-    return val;
-}
-
 static void pm_io_space_update(PIIX4PMState *s)
 {
     uint32_t pm_io_base;
@@ -541,18 +393,18 @@ i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
     pci_conf[0x90] = smb_io_base | 1;
     pci_conf[0x91] = smb_io_base >> 8;
     pci_conf[0xd2] = 0x09;
-    register_ioport_write(smb_io_base, 64, 1, smb_ioport_writeb, s);
-    register_ioport_read(smb_io_base, 64, 1, smb_ioport_readb, s);
+    register_ioport_write(smb_io_base, 64, 1, smb_ioport_writeb, &s->smb);
+    register_ioport_read(smb_io_base, 64, 1, smb_ioport_readb, &s->smb);
 
     s->tmr_timer = qemu_new_timer(vm_clock, pm_tmr_timer, s);
 
     register_savevm("piix4_pm", 0, 1, pm_save, pm_load, s);
 
-    s->smbus = i2c_init_bus(NULL, "i2c");
+    pc_smbus_init(&s->smb);
     s->irq = sci_irq;
     qemu_register_reset(piix4_reset, s);
 
-    return s->smbus;
+    return s->smb.smbus;
 }
 
 #if defined(TARGET_I386)
diff --git a/hw/pc_smbus.c b/hw/pc_smbus.c
new file mode 100644
index 0000000..850260d
--- /dev/null
+++ b/hw/pc_smbus.c
@@ -0,0 +1,178 @@
+/*
+ * PC SMBus implementation
+ * splitted from acpi.c
+ *
+ * Copyright (c) 2006 Fabrice Bellard
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License version 2 as published by the Free Software Foundation.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA  02110-1301 USA
+ */
+#include "hw.h"
+#include "pc.h"
+#include "pc_smbus.h"
+#include "pci.h"
+#include "qemu-timer.h"
+#include "sysemu.h"
+#include "i2c.h"
+#include "smbus.h"
+#include "kvm.h"
+
+/* no save/load? */
+
+#define SMBHSTSTS       0x00
+#define SMBHSTCNT       0x02
+#define SMBHSTCMD       0x03
+#define SMBHSTADD       0x04
+#define SMBHSTDAT0      0x05
+#define SMBHSTDAT1      0x06
+#define SMBBLKDAT       0x07
+
+static void smb_transaction(PCSMBus *s)
+{
+    uint8_t prot = (s->smb_ctl >> 2) & 0x07;
+    uint8_t read = s->smb_addr & 0x01;
+    uint8_t cmd = s->smb_cmd;
+    uint8_t addr = s->smb_addr >> 1;
+    i2c_bus *bus = s->smbus;
+
+#ifdef DEBUG
+    printf("SMBus trans addr=0x%02x prot=0x%02x\n", addr, prot);
+#endif
+    switch(prot) {
+    case 0x0:
+        smbus_quick_command(bus, addr, read);
+        break;
+    case 0x1:
+        if (read) {
+            s->smb_data0 = smbus_receive_byte(bus, addr);
+        } else {
+            smbus_send_byte(bus, addr, cmd);
+        }
+        break;
+    case 0x2:
+        if (read) {
+            s->smb_data0 = smbus_read_byte(bus, addr, cmd);
+        } else {
+            smbus_write_byte(bus, addr, cmd, s->smb_data0);
+        }
+        break;
+    case 0x3:
+        if (read) {
+            uint16_t val;
+            val = smbus_read_word(bus, addr, cmd);
+            s->smb_data0 = val;
+            s->smb_data1 = val >> 8;
+        } else {
+            smbus_write_word(bus, addr, cmd, (s->smb_data1 << 8) | s->smb_data0);
+        }
+        break;
+    case 0x5:
+        if (read) {
+            s->smb_data0 = smbus_read_block(bus, addr, cmd, s->smb_data);
+        } else {
+            smbus_write_block(bus, addr, cmd, s->smb_data, s->smb_data0);
+        }
+        break;
+    default:
+        goto error;
+    }
+    return;
+
+  error:
+    s->smb_stat |= 0x04;
+}
+
+void smb_ioport_writeb(void *opaque, uint32_t addr, uint32_t val)
+{
+    PCSMBus *s = opaque;
+    addr &= 0x3f;
+#ifdef DEBUG
+    printf("SMB writeb port=0x%04x val=0x%02x\n", addr, val);
+#endif
+    switch(addr) {
+    case SMBHSTSTS:
+        s->smb_stat = 0;
+        s->smb_index = 0;
+        break;
+    case SMBHSTCNT:
+        s->smb_ctl = val;
+        if (val & 0x40)
+            smb_transaction(s);
+        break;
+    case SMBHSTCMD:
+        s->smb_cmd = val;
+        break;
+    case SMBHSTADD:
+        s->smb_addr = val;
+        break;
+    case SMBHSTDAT0:
+        s->smb_data0 = val;
+        break;
+    case SMBHSTDAT1:
+        s->smb_data1 = val;
+        break;
+    case SMBBLKDAT:
+        s->smb_data[s->smb_index++] = val;
+        if (s->smb_index > 31)
+            s->smb_index = 0;
+        break;
+    default:
+        break;
+    }
+}
+
+uint32_t smb_ioport_readb(void *opaque, uint32_t addr)
+{
+    PCSMBus *s = opaque;
+    uint32_t val;
+
+    addr &= 0x3f;
+    switch(addr) {
+    case SMBHSTSTS:
+        val = s->smb_stat;
+        break;
+    case SMBHSTCNT:
+        s->smb_index = 0;
+        val = s->smb_ctl & 0x1f;
+        break;
+    case SMBHSTCMD:
+        val = s->smb_cmd;
+        break;
+    case SMBHSTADD:
+        val = s->smb_addr;
+        break;
+    case SMBHSTDAT0:
+        val = s->smb_data0;
+        break;
+    case SMBHSTDAT1:
+        val = s->smb_data1;
+        break;
+    case SMBBLKDAT:
+        val = s->smb_data[s->smb_index++];
+        if (s->smb_index > 31)
+            s->smb_index = 0;
+        break;
+    default:
+        val = 0;
+        break;
+    }
+#ifdef DEBUG
+    printf("SMB readb port=0x%04x val=0x%02x\n", addr, val);
+#endif
+    return val;
+}
+
+void pc_smbus_init(PCSMBus *smb)
+{
+    smb->smbus = i2c_init_bus(NULL, "i2c");
+}
diff --git a/hw/pc_smbus.h b/hw/pc_smbus.h
new file mode 100644
index 0000000..5e5a66f
--- /dev/null
+++ b/hw/pc_smbus.h
@@ -0,0 +1,43 @@
+/*
+ * QEMU PC SMBUS controller Emulation
+ *
+ *  Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
+ *                     VA Linux Systems Japan K.K.
+ *
+ *  This is based on piix_pci.c, but heavily modified.
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA  02110-1301 USA
+ */
+#ifndef PC_SMBUS_H
+#define PC_SMBUS_H
+
+typedef struct PCSMBus {
+    i2c_bus *smbus;
+
+    uint8_t smb_stat;
+    uint8_t smb_ctl;
+    uint8_t smb_cmd;
+    uint8_t smb_addr;
+    uint8_t smb_data0;
+    uint8_t smb_data1;
+    uint8_t smb_data[32];
+    uint8_t smb_index;
+} PCSMBus;
+
+void pc_smbus_init(PCSMBus *smb);
+void smb_ioport_writeb(void *opaque, uint32_t addr, uint32_t val);
+uint32_t smb_ioport_readb(void *opaque, uint32_t addr);
+
+#endif /* !PC_SMBUS_H */
-- 
1.6.0.2

[Qemu-devel] [PATCH 02/17] acpi.c: split out apm register emulation.

[Isaku Yamahata]

Split out apm register emulation for acpi.c into pc_apm.c.
The apm emulation will be used later.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
---
 Makefile.target |    4 +-
 hw/acpi.c       |   60 ++++++++++-------------------------
 hw/pc_apm.c     |   92 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
 hw/pc_apm.h     |   39 +++++++++++++++++++++++
 4 files changed, 150 insertions(+), 45 deletions(-)
 create mode 100644 hw/pc_apm.c
 create mode 100644 hw/pc_apm.h

diff --git a/Makefile.target b/Makefile.target
index 28e2edb..3d09eeb 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -567,7 +567,7 @@ obj-y += fdc.o mc146818rtc.o serial.o i8259.o i8254.o pcspk.o pc.o
 obj-y += cirrus_vga.o apic.o ioapic.o parallel.o acpi.o piix_pci.o
 obj-y += usb-uhci.o vmmouse.o vmport.o vmware_vga.o hpet.o
 obj-y += device-hotplug.o pci-hotplug.o smbios.o
-obj-y += pc_smbus.o
+obj-y += pc_smbus.o pc_apm.o
 CPPFLAGS += -DHAS_AUDIO -DHAS_AUDIO_CHOICE
 endif
 ifeq ($(TARGET_BASE_ARCH), ppc)
@@ -600,7 +600,7 @@ obj-y += mips_timer.o mips_int.o dma.o vga.o serial.o i8254.o i8259.o rc4030.o
 obj-y += g364fb.o jazz_led.o dp8393x.o
 obj-y += ide.o gt64xxx.o pckbd.o fdc.o mc146818rtc.o usb-uhci.o acpi.o ds1225y.o
 obj-y += piix_pci.o parallel.o cirrus_vga.o pcspk.o $(sound-obj-y)
-obj-y += pc_smbus.o
+obj-y += pc_smbus.o pc_apm.o
 obj-y += mipsnet.o
 obj-y += pflash_cfi01.o
 obj-y += vmware_vga.o
diff --git a/hw/acpi.c b/hw/acpi.c
index 8e58c67..7351947 100644
--- a/hw/acpi.c
+++ b/hw/acpi.c
@@ -18,6 +18,7 @@
  */
 #include "hw.h"
 #include "pc.h"
+#include "pc_apm.h"
 #include "pc_smbus.h"
 #include "pci.h"
 #include "qemu-timer.h"
@@ -38,8 +39,9 @@ typedef struct PIIX4PMState {
     uint16_t pmsts;
     uint16_t pmen;
     uint16_t pmcntrl;
-    uint8_t apmc;
-    uint8_t apms;
+
+    APMState apm;
+
     QEMUTimer *tmr_timer;
     int64_t tmr_overflow_time;
 
@@ -217,46 +219,20 @@ static uint32_t pm_ioport_readl(void *opaque, uint32_t addr)
     return val;
 }
 
-static void pm_smi_writeb(void *opaque, uint32_t addr, uint32_t val)
+static void apm_ctrl_changed(uint32_t val, void *arg)
 {
-    PIIX4PMState *s = opaque;
-    addr &= 1;
-#ifdef DEBUG
-    printf("pm_smi_writeb addr=0x%x val=0x%02x\n", addr, val);
-#endif
-    if (addr == 0) {
-        s->apmc = val;
-
-        /* ACPI specs 3.0, 4.7.2.5 */
-        if (val == ACPI_ENABLE) {
-            s->pmcntrl |= SCI_EN;
-        } else if (val == ACPI_DISABLE) {
-            s->pmcntrl &= ~SCI_EN;
-        }
+    PIIX4PMState *s = arg;
 
-        if (s->dev.config[0x5b] & (1 << 1)) {
-            cpu_interrupt(first_cpu, CPU_INTERRUPT_SMI);
-        }
-    } else {
-        s->apms = val;
+    /* ACPI specs 3.0, 4.7.2.5 */
+    if (val == ACPI_ENABLE) {
+        s->pmcntrl |= SCI_EN;
+    } else if (val == ACPI_DISABLE) {
+        s->pmcntrl &= ~SCI_EN;
     }
-}
 
-static uint32_t pm_smi_readb(void *opaque, uint32_t addr)
-{
-    PIIX4PMState *s = opaque;
-    uint32_t val;
-
-    addr &= 1;
-    if (addr == 0) {
-        val = s->apmc;
-    } else {
-        val = s->apms;
+    if (s->dev.config[0x5b] & (1 << 1)) {
+        cpu_interrupt(first_cpu, CPU_INTERRUPT_SMI);
     }
-#ifdef DEBUG
-    printf("pm_smi_readb addr=0x%x val=0x%02x\n", addr, val);
-#endif
-    return val;
 }
 
 static void acpi_dbg_writel(void *opaque, uint32_t addr, uint32_t val)
@@ -302,8 +278,7 @@ static void pm_save(QEMUFile* f,void *opaque)
     qemu_put_be16s(f, &s->pmsts);
     qemu_put_be16s(f, &s->pmen);
     qemu_put_be16s(f, &s->pmcntrl);
-    qemu_put_8s(f, &s->apmc);
-    qemu_put_8s(f, &s->apms);
+    apm_save(f, &s->apm);
     qemu_put_timer(f, s->tmr_timer);
     qemu_put_be64(f, s->tmr_overflow_time);
 }
@@ -323,8 +298,7 @@ static int pm_load(QEMUFile* f,void* opaque,int version_id)
     qemu_get_be16s(f, &s->pmsts);
     qemu_get_be16s(f, &s->pmen);
     qemu_get_be16s(f, &s->pmcntrl);
-    qemu_get_8s(f, &s->apmc);
-    qemu_get_8s(f, &s->apms);
+    apm_load(f, &s->apm);
     qemu_get_timer(f, s->tmr_timer);
     s->tmr_overflow_time=qemu_get_be64(f);
 
@@ -372,8 +346,8 @@ i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
 
     pci_conf[0x40] = 0x01; /* PM io base read only bit */
 
-    register_ioport_write(0xb2, 2, 1, pm_smi_writeb, s);
-    register_ioport_read(0xb2, 2, 1, pm_smi_readb, s);
+    /* APM */
+    apm_init(&s->apm, apm_ctrl_changed, s);
 
     register_ioport_write(ACPI_DBG_IO_ADDR, 4, 4, acpi_dbg_writel, s);
 
diff --git a/hw/pc_apm.c b/hw/pc_apm.c
new file mode 100644
index 0000000..dac43fb
--- /dev/null
+++ b/hw/pc_apm.c
@@ -0,0 +1,92 @@
+/*
+ * QEMU PC APM controller Emulation
+ *
+ *  Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
+ *                     VA Linux Systems Japan K.K.
+ *
+ * This is split out from acpi.c
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA  02110-1301 USA
+ */
+
+#include "pc_apm.h"
+#include "hw.h"
+#include "isa.h"
+
+//#define DEBUG
+
+/* fixed I/O location */
+#define APM_CNT_IOPORT  0xb2
+#define APM_STS_IOPORT  0xb3
+
+static void *apm_arg;
+static apm_ctrl_changed_t apm_callback;
+
+static void apm_ioport_writeb(void *opaque, uint32_t addr, uint32_t val)
+{
+    APMState *apm = opaque;
+    addr &= 1;
+#ifdef DEBUG
+    printf("apm_ioport_writeb addr=0x%x val=0x%02x\n", addr, val);
+#endif
+    if (addr == 0) {
+        apm->apmc = val;
+
+        if (apm_callback) {
+            apm_callback(val, apm_arg);
+        }
+    } else {
+        apm->apms = val;
+    }
+}
+
+static uint32_t apm_ioport_readb(void *opaque, uint32_t addr)
+{
+    APMState *apm = opaque;
+    uint32_t val;
+
+    addr &= 1;
+    if (addr == 0) {
+        val = apm->apmc;
+    } else {
+        val = apm->apms;
+    }
+#ifdef DEBUG
+    printf("apm_ioport_readb addr=0x%x val=0x%02x\n", addr, val);
+#endif
+    return val;
+}
+
+void apm_save(QEMUFile *f, APMState *apm)
+{
+    qemu_put_8s(f, &apm->apmc);
+    qemu_put_8s(f, &apm->apms);
+}
+
+void apm_load(QEMUFile *f, APMState *apm)
+{
+    qemu_get_8s(f, &apm->apmc);
+    qemu_get_8s(f, &apm->apms);
+}
+
+void apm_init(APMState *apm, apm_ctrl_changed_t callback, void *arg)
+{
+    apm_callback = callback;
+    apm_arg = arg;
+
+    /* ioport 0xb2, 0xb3 */
+    register_ioport_write(APM_CNT_IOPORT, 2, 1, apm_ioport_writeb, apm);
+    register_ioport_read(APM_CNT_IOPORT, 2, 1, apm_ioport_readb, apm);
+}
diff --git a/hw/pc_apm.h b/hw/pc_apm.h
new file mode 100644
index 0000000..9f4120c
--- /dev/null
+++ b/hw/pc_apm.h
@@ -0,0 +1,39 @@
+/*
+ * QEMU PC APM controller Emulation
+ *
+ *  Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
+ *                     VA Linux Systems Japan K.K.
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA  02110-1301 USA
+ */
+
+#ifndef PC_APM_H
+#define PC_APM_H
+
+#include <stdint.h>
+#include "qemu-common.h"
+
+typedef struct APMState {
+    uint8_t apmc;
+    uint8_t apms;
+} APMState;
+
+typedef void (*apm_ctrl_changed_t)(uint32_t val, void *arg);
+void apm_init(APMState *s, apm_ctrl_changed_t callback, void *arg);
+
+void apm_save(QEMUFile *f, APMState *apm);
+void apm_load(QEMUFile *f, APMState *apm);
+
+#endif /* PC_APM_H */
-- 
1.6.0.2

[Qemu-devel] [PATCH 03/17] acpi.c: make qemu_system_powerdown() piix independent.

[Isaku Yamahata]

Make qemu_system_powerdown() piix independent by
registering callback function.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
---
 hw/acpi.c |   30 ++++++++++++++++++++++++++----
 hw/acpi.h |   29 +++++++++++++++++++++++++++++
 2 files changed, 55 insertions(+), 4 deletions(-)
 create mode 100644 hw/acpi.h

diff --git a/hw/acpi.c b/hw/acpi.c
index 7351947..14015cd 100644
--- a/hw/acpi.c
+++ b/hw/acpi.c
@@ -26,6 +26,7 @@
 #include "i2c.h"
 #include "smbus.h"
 #include "kvm.h"
+#include "acpi.h"
 
 //#define DEBUG
 
@@ -323,6 +324,18 @@ static void piix4_reset(void *opaque)
     }
 }
 
+#if defined(TARGET_I386)
+static void piix4_pm_powerdown(void *arg)
+{
+    PIIX4PMState *pm_state = (PIIX4PMState*) arg;
+
+    if (pm_state->pmen & PWRBTN_EN) {
+        pm_state->pmsts |= PWRBTN_EN;
+        pm_update_sci(pm_state);
+    }
+}
+#endif
+
 i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
                        qemu_irq sci_irq)
 {
@@ -377,18 +390,27 @@ i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
     pc_smbus_init(&s->smb);
     s->irq = sci_irq;
     qemu_register_reset(piix4_reset, s);
+    qemu_system_powerdown_register(piix4_pm_powerdown, pm_state);
 
     return s->smb.smbus;
 }
 
 #if defined(TARGET_I386)
+static qemu_powerdown_t qemu_powerdown_callback;
+static void *qemu_powerdown_arg;
+
+void qemu_system_powerdown_register(qemu_powerdown_t callback, void *arg)
+{
+    qemu_powerdown_callback = callback;
+    qemu_powerdown_arg = arg;
+}
+
 void qemu_system_powerdown(void)
 {
-    if (!pm_state) {
+    if (!qemu_powerdown_callback) {
         qemu_system_shutdown_request();
-    } else if (pm_state->pmen & PWRBTN_EN) {
-        pm_state->pmsts |= PWRBTN_EN;
-	pm_update_sci(pm_state);
+    } else {
+        qemu_powerdown_callback(qemu_powerdown_arg);
     }
 }
 #endif
diff --git a/hw/acpi.h b/hw/acpi.h
new file mode 100644
index 0000000..884512c
--- /dev/null
+++ b/hw/acpi.h
@@ -0,0 +1,29 @@
+#ifndef QEMU_HW_ACPI_H
+#define QEMU_HW_ACPI_H
+/*
+ *  Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
+ *                     VA Linux Systems Japan K.K.
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA  02110-1301 USA
+ */
+
+#if defined(TARGET_I386)
+typedef void (*qemu_powerdown_t)(void *arg);
+void qemu_system_powerdown_register(qemu_powerdown_t callback, void *arg);
+#else
+#define qemu_system_powerdown_register(callback, arg)   do { } while (0)
+#endif
+
+#endif /* !QEMU_HW_ACPI_H */
-- 
1.6.0.2

[Qemu-devel] [PATCH 04/17] acpi: add acpi constants from linux header files and use them.

[Isaku Yamahata]

add acpi constants from linux header files and
replace the old constants with them.
The acpi constants will be used by other file.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
---
 hw/acpi.c |   55 ++++++++++++++++++++++++-------------------------------
 hw/acpi.h |   56 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 80 insertions(+), 31 deletions(-)

diff --git a/hw/acpi.c b/hw/acpi.c
index 14015cd..b574c5e 100644
--- a/hw/acpi.c
+++ b/hw/acpi.c
@@ -30,9 +30,6 @@
 
 //#define DEBUG
 
-/* i82731AB (PIIX4) compatible power management function */
-#define PM_FREQ 3579545
-
 #define ACPI_DBG_IO_ADDR  0xb044
 
 typedef struct PIIX4PMState {
@@ -51,17 +48,6 @@ typedef struct PIIX4PMState {
     qemu_irq irq;
 } PIIX4PMState;
 
-#define RSM_STS (1 << 15)
-#define PWRBTN_STS (1 << 8)
-#define RTC_EN (1 << 10)
-#define PWRBTN_EN (1 << 8)
-#define GBL_EN (1 << 5)
-#define TMROF_EN (1 << 0)
-
-#define SCI_EN (1 << 0)
-
-#define SUS_EN (1 << 13)
-
 #define ACPI_ENABLE 0xf1
 #define ACPI_DISABLE 0xf0
 
@@ -70,7 +56,7 @@ static PIIX4PMState *pm_state;
 static uint32_t get_pmtmr(PIIX4PMState *s)
 {
     uint32_t d;
-    d = muldiv64(qemu_get_clock(vm_clock), PM_FREQ, ticks_per_sec);
+    d = muldiv64(qemu_get_clock(vm_clock), PM_TIMER_FREQUENCY, ticks_per_sec);
     return d & 0xffffff;
 }
 
@@ -79,9 +65,9 @@ static int get_pmsts(PIIX4PMState *s)
     int64_t d;
     int pmsts;
     pmsts = s->pmsts;
-    d = muldiv64(qemu_get_clock(vm_clock), PM_FREQ, ticks_per_sec);
+    d = muldiv64(qemu_get_clock(vm_clock), PM_TIMER_FREQUENCY, ticks_per_sec);
     if (d >= s->tmr_overflow_time)
-        s->pmsts |= TMROF_EN;
+        s->pmsts |= ACPI_BITMASK_TIMER_STATUS;
     return s->pmsts;
 }
 
@@ -92,11 +78,16 @@ static void pm_update_sci(PIIX4PMState *s)
 
     pmsts = get_pmsts(s);
     sci_level = (((pmsts & s->pmen) &
-                  (RTC_EN | PWRBTN_EN | GBL_EN | TMROF_EN)) != 0);
+                  (ACPI_BITMASK_RT_CLOCK_ENABLE |
+                   ACPI_BITMASK_POWER_BUTTON_ENABLE |
+                   ACPI_BITMASK_GLOBAL_LOCK_ENABLE |
+                   ACPI_BITMASK_TIMER_ENABLE)) != 0);
     qemu_set_irq(s->irq, sci_level);
     /* schedule a timer interruption if needed */
-    if ((s->pmen & TMROF_EN) && !(pmsts & TMROF_EN)) {
-        expire_time = muldiv64(s->tmr_overflow_time, ticks_per_sec, PM_FREQ);
+    if ((s->pmen & ACPI_BITMASK_TIMER_ENABLE) &&
+        !(pmsts & ACPI_BITMASK_TIMER_STATUS)) {
+        expire_time = muldiv64(s->tmr_overflow_time, ticks_per_sec,
+                               PM_TIMER_FREQUENCY);
         qemu_mod_timer(s->tmr_timer, expire_time);
     } else {
         qemu_del_timer(s->tmr_timer);
@@ -119,9 +110,10 @@ static void pm_ioport_writew(void *opaque, uint32_t addr, uint32_t val)
             int64_t d;
             int pmsts;
             pmsts = get_pmsts(s);
-            if (pmsts & val & TMROF_EN) {
+            if (pmsts & val & ACPI_BITMASK_TIMER_STATUS) {
                 /* if TMRSTS is reset, then compute the new overflow time */
-                d = muldiv64(qemu_get_clock(vm_clock), PM_FREQ, ticks_per_sec);
+                d = muldiv64(qemu_get_clock(vm_clock), PM_TIMER_FREQUENCY,
+                             ticks_per_sec);
                 s->tmr_overflow_time = (d + 0x800000LL) & ~0x7fffffLL;
             }
             s->pmsts &= ~val;
@@ -135,8 +127,8 @@ static void pm_ioport_writew(void *opaque, uint32_t addr, uint32_t val)
     case 0x04:
         {
             int sus_typ;
-            s->pmcntrl = val & ~(SUS_EN);
-            if (val & SUS_EN) {
+            s->pmcntrl = val & ~(ACPI_BITMASK_SLEEP_ENABLE);
+            if (val & ACPI_BITMASK_SLEEP_ENABLE) {
                 /* change suspend type */
                 sus_typ = (val >> 10) & 7;
                 switch(sus_typ) {
@@ -144,9 +136,10 @@ static void pm_ioport_writew(void *opaque, uint32_t addr, uint32_t val)
                     qemu_system_shutdown_request();
                     break;
                 case 1:
-                    /* RSM_STS should be set on resume. Pretend that resume
-                       was caused by power button */
-                    s->pmsts |= (RSM_STS | PWRBTN_STS);
+                    /* ACPI_BITMASK_WAKE_STATUS should be set on resume.
+                       Pretend that resume was caused by power button */
+                    s->pmsts |= (ACPI_BITMASK_WAKE_STATUS |
+                                 ACPI_BITMASK_POWER_BUTTON_STATUS);
                     qemu_system_reset_request();
 #if defined(TARGET_I386)
                     cmos_set_s3_resume();
@@ -226,9 +219,9 @@ static void apm_ctrl_changed(uint32_t val, void *arg)
 
     /* ACPI specs 3.0, 4.7.2.5 */
     if (val == ACPI_ENABLE) {
-        s->pmcntrl |= SCI_EN;
+        s->pmcntrl |= ACPI_BITMASK_SCI_ENABLE;
     } else if (val == ACPI_DISABLE) {
-        s->pmcntrl &= ~SCI_EN;
+        s->pmcntrl &= ~ACPI_BITMASK_SCI_ENABLE;
     }
 
     if (s->dev.config[0x5b] & (1 << 1)) {
@@ -329,8 +322,8 @@ static void piix4_pm_powerdown(void *arg)
 {
     PIIX4PMState *pm_state = (PIIX4PMState*) arg;
 
-    if (pm_state->pmen & PWRBTN_EN) {
-        pm_state->pmsts |= PWRBTN_EN;
+    if (pm_state->pmen & ACPI_BITMASK_POWER_BUTTON_ENABLE) {
+        pm_state->pmsts |= ACPI_BITMASK_POWER_BUTTON_STATUS;
         pm_update_sci(pm_state);
     }
 }
diff --git a/hw/acpi.h b/hw/acpi.h
index 884512c..d686b50 100644
--- a/hw/acpi.h
+++ b/hw/acpi.h
@@ -26,4 +26,60 @@ void qemu_system_powerdown_register(qemu_powerdown_t callback, void *arg);
 #define qemu_system_powerdown_register(callback, arg)   do { } while (0)
 #endif
 
+/* from linux include/acpi/actype.h */
+/* Default ACPI register widths */
+
+#define ACPI_GPE_REGISTER_WIDTH         8
+#define ACPI_PM1_REGISTER_WIDTH         16
+#define ACPI_PM2_REGISTER_WIDTH         8
+#define ACPI_PM_TIMER_WIDTH             32
+
+/* PM Timer ticks per second (HZ) */
+#define PM_TIMER_FREQUENCY  3579545
+
+
+/* ACPI fixed hardware registers */
+
+/* from linux/drivers/acpi/acpica/aclocal.h */
+/* Masks used to access the bit_registers */
+
+/* PM1x_STS */
+#define ACPI_BITMASK_TIMER_STATUS               0x0001
+#define ACPI_BITMASK_BUS_MASTER_STATUS          0x0010
+#define ACPI_BITMASK_GLOBAL_LOCK_STATUS         0x0020
+#define ACPI_BITMASK_POWER_BUTTON_STATUS        0x0100
+#define ACPI_BITMASK_SLEEP_BUTTON_STATUS        0x0200
+#define ACPI_BITMASK_RT_CLOCK_STATUS            0x0400
+#define ACPI_BITMASK_PCIEXP_WAKE_STATUS         0x4000	/* ACPI 3.0 */
+#define ACPI_BITMASK_WAKE_STATUS                0x8000
+
+#define ACPI_BITMASK_ALL_FIXED_STATUS           (\
+	ACPI_BITMASK_TIMER_STATUS          | \
+	ACPI_BITMASK_BUS_MASTER_STATUS     | \
+	ACPI_BITMASK_GLOBAL_LOCK_STATUS    | \
+	ACPI_BITMASK_POWER_BUTTON_STATUS   | \
+	ACPI_BITMASK_SLEEP_BUTTON_STATUS   | \
+	ACPI_BITMASK_RT_CLOCK_STATUS       | \
+	ACPI_BITMASK_WAKE_STATUS)
+
+/* PM1x_EN */
+#define ACPI_BITMASK_TIMER_ENABLE               0x0001
+#define ACPI_BITMASK_GLOBAL_LOCK_ENABLE         0x0020
+#define ACPI_BITMASK_POWER_BUTTON_ENABLE        0x0100
+#define ACPI_BITMASK_SLEEP_BUTTON_ENABLE        0x0200
+#define ACPI_BITMASK_RT_CLOCK_ENABLE            0x0400
+#define ACPI_BITMASK_PCIEXP_WAKE_DISABLE        0x4000	/* ACPI 3.0 */
+
+/* PM1x_CNT */
+#define ACPI_BITMASK_SCI_ENABLE                 0x0001
+#define ACPI_BITMASK_BUS_MASTER_RLD             0x0002
+#define ACPI_BITMASK_GLOBAL_LOCK_RELEASE        0x0004
+#define ACPI_BITMASK_SLEEP_TYPE                 0x1C00
+#define ACPI_BITMASK_SLEEP_ENABLE               0x2000
+
+/* PM2_CNT */
+#define ACPI_BITMASK_ARB_DISABLE                0x0001
+
+/* PM_TMR */
+
 #endif /* !QEMU_HW_ACPI_H */
-- 
1.6.0.2

[Qemu-devel] [PATCH 05/17] acpi.c: split acpi.c into the common part and the piix4 part.

[Isaku Yamahata]

Split acpi.c into the common part and the piix4 specific part.
The common part will be used later.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
---
 Makefile.target             |    4 +-
 hw/acpi.c                   |  555 -------------------------------------------
 hw/{acpi.c => acpi_piix4.c} |  201 +----------------
 3 files changed, 3 insertions(+), 757 deletions(-)
 copy hw/{acpi.c => acpi_piix4.c} (73%)

diff --git a/Makefile.target b/Makefile.target
index 3d09eeb..4f8dd35 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -567,7 +567,7 @@ obj-y += fdc.o mc146818rtc.o serial.o i8259.o i8254.o pcspk.o pc.o
 obj-y += cirrus_vga.o apic.o ioapic.o parallel.o acpi.o piix_pci.o
 obj-y += usb-uhci.o vmmouse.o vmport.o vmware_vga.o hpet.o
 obj-y += device-hotplug.o pci-hotplug.o smbios.o
-obj-y += pc_smbus.o pc_apm.o
+obj-y += pc_smbus.o pc_apm.o acpi_piix4.o
 CPPFLAGS += -DHAS_AUDIO -DHAS_AUDIO_CHOICE
 endif
 ifeq ($(TARGET_BASE_ARCH), ppc)
@@ -600,7 +600,7 @@ obj-y += mips_timer.o mips_int.o dma.o vga.o serial.o i8254.o i8259.o rc4030.o
 obj-y += g364fb.o jazz_led.o dp8393x.o
 obj-y += ide.o gt64xxx.o pckbd.o fdc.o mc146818rtc.o usb-uhci.o acpi.o ds1225y.o
 obj-y += piix_pci.o parallel.o cirrus_vga.o pcspk.o $(sound-obj-y)
-obj-y += pc_smbus.o pc_apm.o
+obj-y += pc_smbus.o pc_apm.o acpi_piix4.o
 obj-y += mipsnet.o
 obj-y += pflash_cfi01.o
 obj-y += vmware_vga.o
diff --git a/hw/acpi.c b/hw/acpi.c
index b574c5e..19f5df0 100644
--- a/hw/acpi.c
+++ b/hw/acpi.c
@@ -18,376 +18,10 @@
  */
 #include "hw.h"
 #include "pc.h"
-#include "pc_apm.h"
-#include "pc_smbus.h"
 #include "pci.h"
-#include "qemu-timer.h"
 #include "sysemu.h"
-#include "i2c.h"
-#include "smbus.h"
-#include "kvm.h"
 #include "acpi.h"
 
-//#define DEBUG
-
-#define ACPI_DBG_IO_ADDR  0xb044
-
-typedef struct PIIX4PMState {
-    PCIDevice dev;
-    uint16_t pmsts;
-    uint16_t pmen;
-    uint16_t pmcntrl;
-
-    APMState apm;
-
-    QEMUTimer *tmr_timer;
-    int64_t tmr_overflow_time;
-
-    PCSMBus smb;
-
-    qemu_irq irq;
-} PIIX4PMState;
-
-#define ACPI_ENABLE 0xf1
-#define ACPI_DISABLE 0xf0
-
-static PIIX4PMState *pm_state;
-
-static uint32_t get_pmtmr(PIIX4PMState *s)
-{
-    uint32_t d;
-    d = muldiv64(qemu_get_clock(vm_clock), PM_TIMER_FREQUENCY, ticks_per_sec);
-    return d & 0xffffff;
-}
-
-static int get_pmsts(PIIX4PMState *s)
-{
-    int64_t d;
-    int pmsts;
-    pmsts = s->pmsts;
-    d = muldiv64(qemu_get_clock(vm_clock), PM_TIMER_FREQUENCY, ticks_per_sec);
-    if (d >= s->tmr_overflow_time)
-        s->pmsts |= ACPI_BITMASK_TIMER_STATUS;
-    return s->pmsts;
-}
-
-static void pm_update_sci(PIIX4PMState *s)
-{
-    int sci_level, pmsts;
-    int64_t expire_time;
-
-    pmsts = get_pmsts(s);
-    sci_level = (((pmsts & s->pmen) &
-                  (ACPI_BITMASK_RT_CLOCK_ENABLE |
-                   ACPI_BITMASK_POWER_BUTTON_ENABLE |
-                   ACPI_BITMASK_GLOBAL_LOCK_ENABLE |
-                   ACPI_BITMASK_TIMER_ENABLE)) != 0);
-    qemu_set_irq(s->irq, sci_level);
-    /* schedule a timer interruption if needed */
-    if ((s->pmen & ACPI_BITMASK_TIMER_ENABLE) &&
-        !(pmsts & ACPI_BITMASK_TIMER_STATUS)) {
-        expire_time = muldiv64(s->tmr_overflow_time, ticks_per_sec,
-                               PM_TIMER_FREQUENCY);
-        qemu_mod_timer(s->tmr_timer, expire_time);
-    } else {
-        qemu_del_timer(s->tmr_timer);
-    }
-}
-
-static void pm_tmr_timer(void *opaque)
-{
-    PIIX4PMState *s = opaque;
-    pm_update_sci(s);
-}
-
-static void pm_ioport_writew(void *opaque, uint32_t addr, uint32_t val)
-{
-    PIIX4PMState *s = opaque;
-    addr &= 0x3f;
-    switch(addr) {
-    case 0x00:
-        {
-            int64_t d;
-            int pmsts;
-            pmsts = get_pmsts(s);
-            if (pmsts & val & ACPI_BITMASK_TIMER_STATUS) {
-                /* if TMRSTS is reset, then compute the new overflow time */
-                d = muldiv64(qemu_get_clock(vm_clock), PM_TIMER_FREQUENCY,
-                             ticks_per_sec);
-                s->tmr_overflow_time = (d + 0x800000LL) & ~0x7fffffLL;
-            }
-            s->pmsts &= ~val;
-            pm_update_sci(s);
-        }
-        break;
-    case 0x02:
-        s->pmen = val;
-        pm_update_sci(s);
-        break;
-    case 0x04:
-        {
-            int sus_typ;
-            s->pmcntrl = val & ~(ACPI_BITMASK_SLEEP_ENABLE);
-            if (val & ACPI_BITMASK_SLEEP_ENABLE) {
-                /* change suspend type */
-                sus_typ = (val >> 10) & 7;
-                switch(sus_typ) {
-                case 0: /* soft power off */
-                    qemu_system_shutdown_request();
-                    break;
-                case 1:
-                    /* ACPI_BITMASK_WAKE_STATUS should be set on resume.
-                       Pretend that resume was caused by power button */
-                    s->pmsts |= (ACPI_BITMASK_WAKE_STATUS |
-                                 ACPI_BITMASK_POWER_BUTTON_STATUS);
-                    qemu_system_reset_request();
-#if defined(TARGET_I386)
-                    cmos_set_s3_resume();
-#endif
-                default:
-                    break;
-                }
-            }
-        }
-        break;
-    default:
-        break;
-    }
-#ifdef DEBUG
-    printf("PM writew port=0x%04x val=0x%04x\n", addr, val);
-#endif
-}
-
-static uint32_t pm_ioport_readw(void *opaque, uint32_t addr)
-{
-    PIIX4PMState *s = opaque;
-    uint32_t val;
-
-    addr &= 0x3f;
-    switch(addr) {
-    case 0x00:
-        val = get_pmsts(s);
-        break;
-    case 0x02:
-        val = s->pmen;
-        break;
-    case 0x04:
-        val = s->pmcntrl;
-        break;
-    default:
-        val = 0;
-        break;
-    }
-#ifdef DEBUG
-    printf("PM readw port=0x%04x val=0x%04x\n", addr, val);
-#endif
-    return val;
-}
-
-static void pm_ioport_writel(void *opaque, uint32_t addr, uint32_t val)
-{
-    //    PIIX4PMState *s = opaque;
-    addr &= 0x3f;
-#ifdef DEBUG
-    printf("PM writel port=0x%04x val=0x%08x\n", addr, val);
-#endif
-}
-
-static uint32_t pm_ioport_readl(void *opaque, uint32_t addr)
-{
-    PIIX4PMState *s = opaque;
-    uint32_t val;
-
-    addr &= 0x3f;
-    switch(addr) {
-    case 0x08:
-        val = get_pmtmr(s);
-        break;
-    default:
-        val = 0;
-        break;
-    }
-#ifdef DEBUG
-    printf("PM readl port=0x%04x val=0x%08x\n", addr, val);
-#endif
-    return val;
-}
-
-static void apm_ctrl_changed(uint32_t val, void *arg)
-{
-    PIIX4PMState *s = arg;
-
-    /* ACPI specs 3.0, 4.7.2.5 */
-    if (val == ACPI_ENABLE) {
-        s->pmcntrl |= ACPI_BITMASK_SCI_ENABLE;
-    } else if (val == ACPI_DISABLE) {
-        s->pmcntrl &= ~ACPI_BITMASK_SCI_ENABLE;
-    }
-
-    if (s->dev.config[0x5b] & (1 << 1)) {
-        cpu_interrupt(first_cpu, CPU_INTERRUPT_SMI);
-    }
-}
-
-static void acpi_dbg_writel(void *opaque, uint32_t addr, uint32_t val)
-{
-#if defined(DEBUG)
-    printf("ACPI: DBG: 0x%08x\n", val);
-#endif
-}
-
-static void pm_io_space_update(PIIX4PMState *s)
-{
-    uint32_t pm_io_base;
-
-    if (s->dev.config[0x80] & 1) {
-        pm_io_base = le32_to_cpu(*(uint32_t *)(s->dev.config + 0x40));
-        pm_io_base &= 0xffc0;
-
-        /* XXX: need to improve memory and ioport allocation */
-#if defined(DEBUG)
-        printf("PM: mapping to 0x%x\n", pm_io_base);
-#endif
-        register_ioport_write(pm_io_base, 64, 2, pm_ioport_writew, s);
-        register_ioport_read(pm_io_base, 64, 2, pm_ioport_readw, s);
-        register_ioport_write(pm_io_base, 64, 4, pm_ioport_writel, s);
-        register_ioport_read(pm_io_base, 64, 4, pm_ioport_readl, s);
-    }
-}
-
-static void pm_write_config(PCIDevice *d,
-                            uint32_t address, uint32_t val, int len)
-{
-    pci_default_write_config(d, address, val, len);
-    if (address == 0x80)
-        pm_io_space_update((PIIX4PMState *)d);
-}
-
-static void pm_save(QEMUFile* f,void *opaque)
-{
-    PIIX4PMState *s = opaque;
-
-    pci_device_save(&s->dev, f);
-
-    qemu_put_be16s(f, &s->pmsts);
-    qemu_put_be16s(f, &s->pmen);
-    qemu_put_be16s(f, &s->pmcntrl);
-    apm_save(f, &s->apm);
-    qemu_put_timer(f, s->tmr_timer);
-    qemu_put_be64(f, s->tmr_overflow_time);
-}
-
-static int pm_load(QEMUFile* f,void* opaque,int version_id)
-{
-    PIIX4PMState *s = opaque;
-    int ret;
-
-    if (version_id > 1)
-        return -EINVAL;
-
-    ret = pci_device_load(&s->dev, f);
-    if (ret < 0)
-        return ret;
-
-    qemu_get_be16s(f, &s->pmsts);
-    qemu_get_be16s(f, &s->pmen);
-    qemu_get_be16s(f, &s->pmcntrl);
-    apm_load(f, &s->apm);
-    qemu_get_timer(f, s->tmr_timer);
-    s->tmr_overflow_time=qemu_get_be64(f);
-
-    pm_io_space_update(s);
-
-    return 0;
-}
-
-static void piix4_reset(void *opaque)
-{
-    PIIX4PMState *s = opaque;
-    uint8_t *pci_conf = s->dev.config;
-
-    pci_conf[0x58] = 0;
-    pci_conf[0x59] = 0;
-    pci_conf[0x5a] = 0;
-    pci_conf[0x5b] = 0;
-
-    if (kvm_enabled()) {
-        /* Mark SMM as already inited (until KVM supports SMM). */
-        pci_conf[0x5B] = 0x02;
-    }
-}
-
-#if defined(TARGET_I386)
-static void piix4_pm_powerdown(void *arg)
-{
-    PIIX4PMState *pm_state = (PIIX4PMState*) arg;
-
-    if (pm_state->pmen & ACPI_BITMASK_POWER_BUTTON_ENABLE) {
-        pm_state->pmsts |= ACPI_BITMASK_POWER_BUTTON_STATUS;
-        pm_update_sci(pm_state);
-    }
-}
-#endif
-
-i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
-                       qemu_irq sci_irq)
-{
-    PIIX4PMState *s;
-    uint8_t *pci_conf;
-
-    s = (PIIX4PMState *)pci_register_device(bus,
-                                         "PM", sizeof(PIIX4PMState),
-                                         devfn, NULL, pm_write_config);
-    pm_state = s;
-    pci_conf = s->dev.config;
-    pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL);
-    pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371AB_3);
-    pci_conf[0x06] = 0x80;
-    pci_conf[0x07] = 0x02;
-    pci_conf[0x08] = 0x03; // revision number
-    pci_conf[0x09] = 0x00;
-    pci_config_set_class(pci_conf, PCI_CLASS_BRIDGE_OTHER);
-    pci_conf[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type
-    pci_conf[0x3d] = 0x01; // interrupt pin 1
-
-    pci_conf[0x40] = 0x01; /* PM io base read only bit */
-
-    /* APM */
-    apm_init(&s->apm, apm_ctrl_changed, s);
-
-    register_ioport_write(ACPI_DBG_IO_ADDR, 4, 4, acpi_dbg_writel, s);
-
-    if (kvm_enabled()) {
-        /* Mark SMM as already inited to prevent SMM from running.  KVM does not
-         * support SMM mode. */
-        pci_conf[0x5B] = 0x02;
-    }
-
-    /* XXX: which specification is used ? The i82731AB has different
-       mappings */
-    pci_conf[0x5f] = (parallel_hds[0] != NULL ? 0x80 : 0) | 0x10;
-    pci_conf[0x63] = 0x60;
-    pci_conf[0x67] = (serial_hds[0] != NULL ? 0x08 : 0) |
-	(serial_hds[1] != NULL ? 0x90 : 0);
-
-    pci_conf[0x90] = smb_io_base | 1;
-    pci_conf[0x91] = smb_io_base >> 8;
-    pci_conf[0xd2] = 0x09;
-    register_ioport_write(smb_io_base, 64, 1, smb_ioport_writeb, &s->smb);
-    register_ioport_read(smb_io_base, 64, 1, smb_ioport_readb, &s->smb);
-
-    s->tmr_timer = qemu_new_timer(vm_clock, pm_tmr_timer, s);
-
-    register_savevm("piix4_pm", 0, 1, pm_save, pm_load, s);
-
-    pc_smbus_init(&s->smb);
-    s->irq = sci_irq;
-    qemu_register_reset(piix4_reset, s);
-    qemu_system_powerdown_register(piix4_pm_powerdown, pm_state);
-
-    return s->smb.smbus;
-}
-
 #if defined(TARGET_I386)
 static qemu_powerdown_t qemu_powerdown_callback;
 static void *qemu_powerdown_arg;
@@ -408,195 +42,6 @@ void qemu_system_powerdown(void)
 }
 #endif
 
-#define GPE_BASE 0xafe0
-#define PCI_BASE 0xae00
-#define PCI_EJ_BASE 0xae08
-
-struct gpe_regs {
-    uint16_t sts; /* status */
-    uint16_t en;  /* enabled */
-};
-
-struct pci_status {
-    uint32_t up;
-    uint32_t down;
-};
-
-static struct gpe_regs gpe;
-static struct pci_status pci0_status;
-
-static uint32_t gpe_read_val(uint16_t val, uint32_t addr)
-{
-    if (addr & 1)
-        return (val >> 8) & 0xff;
-    return val & 0xff;
-}
-
-static uint32_t gpe_readb(void *opaque, uint32_t addr)
-{
-    uint32_t val = 0;
-    struct gpe_regs *g = opaque;
-    switch (addr) {
-        case GPE_BASE:
-        case GPE_BASE + 1:
-            val = gpe_read_val(g->sts, addr);
-            break;
-        case GPE_BASE + 2:
-        case GPE_BASE + 3:
-            val = gpe_read_val(g->en, addr);
-            break;
-        default:
-            break;
-    }
-
-#if defined(DEBUG)
-    printf("gpe read %x == %x\n", addr, val);
-#endif
-    return val;
-}
-
-static void gpe_write_val(uint16_t *cur, int addr, uint32_t val)
-{
-    if (addr & 1)
-        *cur = (*cur & 0xff) | (val << 8);
-    else
-        *cur = (*cur & 0xff00) | (val & 0xff);
-}
-
-static void gpe_reset_val(uint16_t *cur, int addr, uint32_t val)
-{
-    uint16_t x1, x0 = val & 0xff;
-    int shift = (addr & 1) ? 8 : 0;
-
-    x1 = (*cur >> shift) & 0xff;
-
-    x1 = x1 & ~x0;
-
-    *cur = (*cur & (0xff << (8 - shift))) | (x1 << shift);
-}
-
-static void gpe_writeb(void *opaque, uint32_t addr, uint32_t val)
-{
-    struct gpe_regs *g = opaque;
-    switch (addr) {
-        case GPE_BASE:
-        case GPE_BASE + 1:
-            gpe_reset_val(&g->sts, addr, val);
-            break;
-        case GPE_BASE + 2:
-        case GPE_BASE + 3:
-            gpe_write_val(&g->en, addr, val);
-            break;
-        default:
-            break;
-   }
-
-#if defined(DEBUG)
-    printf("gpe write %x <== %d\n", addr, val);
-#endif
-}
-
-static uint32_t pcihotplug_read(void *opaque, uint32_t addr)
-{
-    uint32_t val = 0;
-    struct pci_status *g = opaque;
-    switch (addr) {
-        case PCI_BASE:
-            val = g->up;
-            break;
-        case PCI_BASE + 4:
-            val = g->down;
-            break;
-        default:
-            break;
-    }
-
-#if defined(DEBUG)
-    printf("pcihotplug read %x == %x\n", addr, val);
-#endif
-    return val;
-}
-
-static void pcihotplug_write(void *opaque, uint32_t addr, uint32_t val)
-{
-    struct pci_status *g = opaque;
-    switch (addr) {
-        case PCI_BASE:
-            g->up = val;
-            break;
-        case PCI_BASE + 4:
-            g->down = val;
-            break;
-   }
-
-#if defined(DEBUG)
-    printf("pcihotplug write %x <== %d\n", addr, val);
-#endif
-}
-
-static uint32_t pciej_read(void *opaque, uint32_t addr)
-{
-#if defined(DEBUG)
-    printf("pciej read %x\n", addr);
-#endif
-    return 0;
-}
-
-static void pciej_write(void *opaque, uint32_t addr, uint32_t val)
-{
-#if defined (TARGET_I386)
-    int slot = ffs(val) - 1;
-
-    pci_device_hot_remove_success(0, slot);
-#endif
-
-#if defined(DEBUG)
-    printf("pciej write %x <== %d\n", addr, val);
-#endif
-}
-
-static void piix4_device_hot_add(int bus, int slot, int state);
-
-void piix4_acpi_system_hot_add_init(void)
-{
-    register_ioport_write(GPE_BASE, 4, 1, gpe_writeb, &gpe);
-    register_ioport_read(GPE_BASE, 4, 1,  gpe_readb, &gpe);
-
-    register_ioport_write(PCI_BASE, 8, 4, pcihotplug_write, &pci0_status);
-    register_ioport_read(PCI_BASE, 8, 4,  pcihotplug_read, &pci0_status);
-
-    register_ioport_write(PCI_EJ_BASE, 4, 4, pciej_write, NULL);
-    register_ioport_read(PCI_EJ_BASE, 4, 4,  pciej_read, NULL);
-
-    qemu_system_device_hot_add_register(piix4_device_hot_add);
-}
-
-static void enable_device(struct pci_status *p, struct gpe_regs *g, int slot)
-{
-    g->sts |= 2;
-    p->up |= (1 << slot);
-}
-
-static void disable_device(struct pci_status *p, struct gpe_regs *g, int slot)
-{
-    g->sts |= 2;
-    p->down |= (1 << slot);
-}
-
-static void piix4_device_hot_add(int bus, int slot, int state)
-{
-    pci0_status.up = 0;
-    pci0_status.down = 0;
-    if (state)
-        enable_device(&pci0_status, &gpe, slot);
-    else
-        disable_device(&pci0_status, &gpe, slot);
-    if (gpe.en & 2) {
-        qemu_set_irq(pm_state->irq, 1);
-        qemu_set_irq(pm_state->irq, 0);
-    }
-}
-
 static qemu_system_device_hot_add_t device_hot_add_callback;
 void qemu_system_device_hot_add_register(qemu_system_device_hot_add_t callback)
 {
diff --git a/hw/acpi.c b/hw/acpi_piix4.c
similarity index 73%
copy from hw/acpi.c
copy to hw/acpi_piix4.c
index b574c5e..2bbb57a 100644
--- a/hw/acpi.c
+++ b/hw/acpi_piix4.c
@@ -255,6 +255,7 @@ static void pm_io_space_update(PIIX4PMState *s)
     }
 }
 
+
 static void pm_write_config(PCIDevice *d,
                             uint32_t address, uint32_t val, int len)
 {
@@ -388,25 +389,6 @@ i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
     return s->smb.smbus;
 }
 
-#if defined(TARGET_I386)
-static qemu_powerdown_t qemu_powerdown_callback;
-static void *qemu_powerdown_arg;
-
-void qemu_system_powerdown_register(qemu_powerdown_t callback, void *arg)
-{
-    qemu_powerdown_callback = callback;
-    qemu_powerdown_arg = arg;
-}
-
-void qemu_system_powerdown(void)
-{
-    if (!qemu_powerdown_callback) {
-        qemu_system_shutdown_request();
-    } else {
-        qemu_powerdown_callback(qemu_powerdown_arg);
-    }
-}
-#endif
 
 #define GPE_BASE 0xafe0
 #define PCI_BASE 0xae00
@@ -596,184 +578,3 @@ static void piix4_device_hot_add(int bus, int slot, int state)
         qemu_set_irq(pm_state->irq, 0);
     }
 }
-
-static qemu_system_device_hot_add_t device_hot_add_callback;
-void qemu_system_device_hot_add_register(qemu_system_device_hot_add_t callback)
-{
-    device_hot_add_callback = callback;
-}
-
-void qemu_system_device_hot_add(int pcibus, int slot, int state)
-{
-    if (device_hot_add_callback)
-        device_hot_add_callback(pcibus, slot, state);
-}
-
-struct acpi_table_header
-{
-    char signature [4];    /* ACPI signature (4 ASCII characters) */
-    uint32_t length;          /* Length of table, in bytes, including header */
-    uint8_t revision;         /* ACPI Specification minor version # */
-    uint8_t checksum;         /* To make sum of entire table == 0 */
-    char oem_id [6];       /* OEM identification */
-    char oem_table_id [8]; /* OEM table identification */
-    uint32_t oem_revision;    /* OEM revision number */
-    char asl_compiler_id [4]; /* ASL compiler vendor ID */
-    uint32_t asl_compiler_revision; /* ASL compiler revision number */
-} __attribute__((packed));
-
-char *acpi_tables;
-size_t acpi_tables_len;
-
-static int acpi_checksum(const uint8_t *data, int len)
-{
-    int sum, i;
-    sum = 0;
-    for(i = 0; i < len; i++)
-        sum += data[i];
-    return (-sum) & 0xff;
-}
-
-int acpi_table_add(const char *t)
-{
-    static const char *dfl_id = "QEMUQEMU";
-    char buf[1024], *p, *f;
-    struct acpi_table_header acpi_hdr;
-    unsigned long val;
-    size_t off;
-
-    memset(&acpi_hdr, 0, sizeof(acpi_hdr));
-  
-    if (get_param_value(buf, sizeof(buf), "sig", t)) {
-        strncpy(acpi_hdr.signature, buf, 4);
-    } else {
-        strncpy(acpi_hdr.signature, dfl_id, 4);
-    }
-    if (get_param_value(buf, sizeof(buf), "rev", t)) {
-        val = strtoul(buf, &p, 10);
-        if (val > 255 || *p != '\0')
-            goto out;
-    } else {
-        val = 1;
-    }
-    acpi_hdr.revision = (int8_t)val;
-
-    if (get_param_value(buf, sizeof(buf), "oem_id", t)) {
-        strncpy(acpi_hdr.oem_id, buf, 6);
-    } else {
-        strncpy(acpi_hdr.oem_id, dfl_id, 6);
-    }
-
-    if (get_param_value(buf, sizeof(buf), "oem_table_id", t)) {
-        strncpy(acpi_hdr.oem_table_id, buf, 8);
-    } else {
-        strncpy(acpi_hdr.oem_table_id, dfl_id, 8);
-    }
-
-    if (get_param_value(buf, sizeof(buf), "oem_rev", t)) {
-        val = strtol(buf, &p, 10);
-        if(*p != '\0')
-            goto out;
-    } else {
-        val = 1;
-    }
-    acpi_hdr.oem_revision = cpu_to_le32(val);
-
-    if (get_param_value(buf, sizeof(buf), "asl_compiler_id", t)) {
-        strncpy(acpi_hdr.asl_compiler_id, buf, 4);
-    } else {
-        strncpy(acpi_hdr.asl_compiler_id, dfl_id, 4);
-    }
-
-    if (get_param_value(buf, sizeof(buf), "asl_compiler_rev", t)) {
-        val = strtol(buf, &p, 10);
-        if(*p != '\0')
-            goto out;
-    } else {
-        val = 1;
-    }
-    acpi_hdr.asl_compiler_revision = cpu_to_le32(val);
-    
-    if (!get_param_value(buf, sizeof(buf), "data", t)) {
-         buf[0] = '\0';
-    }
-
-    acpi_hdr.length = sizeof(acpi_hdr);
-
-    f = buf;
-    while (buf[0]) {
-        struct stat s;
-        char *n = strchr(f, ':');
-        if (n)
-            *n = '\0';
-        if(stat(f, &s) < 0) {
-            fprintf(stderr, "Can't stat file '%s': %s\n", f, strerror(errno));
-            goto out;
-        }
-        acpi_hdr.length += s.st_size;
-        if (!n)
-            break;
-        *n = ':';
-        f = n + 1;
-    }
-
-    if (!acpi_tables) {
-        acpi_tables_len = sizeof(uint16_t);
-        acpi_tables = qemu_mallocz(acpi_tables_len);
-    }
-    p = acpi_tables + acpi_tables_len;
-    acpi_tables_len += sizeof(uint16_t) + acpi_hdr.length;
-    acpi_tables = qemu_realloc(acpi_tables, acpi_tables_len);
-
-    acpi_hdr.length = cpu_to_le32(acpi_hdr.length);
-    *(uint16_t*)p = acpi_hdr.length;
-    p += sizeof(uint16_t);
-    memcpy(p, &acpi_hdr, sizeof(acpi_hdr));
-    off = sizeof(acpi_hdr);
-
-    f = buf;
-    while (buf[0]) {
-        struct stat s;
-        int fd;
-        char *n = strchr(f, ':');
-        if (n)
-            *n = '\0';
-        fd = open(f, O_RDONLY);
-
-        if(fd < 0)
-            goto out;
-        if(fstat(fd, &s) < 0) {
-            close(fd);
-            goto out;
-        }
-
-        do {
-            int r;
-            r = read(fd, p + off, s.st_size);
-            if (r > 0) {
-                off += r;
-                s.st_size -= r;
-            } else if ((r < 0 && errno != EINTR) || r == 0) {
-                close(fd);
-                goto out;
-            }
-        } while(s.st_size);
-
-        close(fd);
-        if (!n)
-            break;
-        f = n + 1;
-    }
-
-    ((struct acpi_table_header*)p)->checksum = acpi_checksum((uint8_t*)p, off);
-    /* increase number of tables */
-    (*(uint16_t*)acpi_tables) =
-	    cpu_to_le32(le32_to_cpu(*(uint16_t*)acpi_tables) + 1);
-    return 0;
-out:
-    if (acpi_tables) {
-        free(acpi_tables);
-        acpi_tables = NULL;
-    }
-    return -1;
-}
-- 
1.6.0.2

[Qemu-devel] [PATCH 06/17] pc.c: Make smm enable/disable function i440fx independent.

[Isaku Yamahata]

make cpu_smm_update() generic to be independent on i440fx by
registering a callback.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
---
 hw/pc.c       |   18 +++++++++++++++---
 hw/pc.h       |    4 +++-
 hw/piix_pci.c |    8 +++++---
 3 files changed, 23 insertions(+), 7 deletions(-)

diff --git a/hw/pc.c b/hw/pc.c
index 553ba5c..bc1c8cf 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -61,7 +61,6 @@ static fdctrl_t *floppy_controller;
 static RTCState *rtc_state;
 static PITState *pit;
 static IOAPICState *ioapic;
-static PCIDevice *i440fx_state;
 
 typedef struct rom_reset_data {
     uint8_t *data;
@@ -121,10 +120,22 @@ uint64_t cpu_get_tsc(CPUX86State *env)
 }
 
 /* SMM support */
+
+static cpu_set_smm_t smm_set;
+static void *smm_arg;
+
+void cpu_smm_register(cpu_set_smm_t callback, void *arg)
+{
+    assert(smm_set == NULL);
+    assert(smm_arg == NULL);
+    smm_set = callback;
+    smm_arg = arg;
+}
+
 void cpu_smm_update(CPUState *env)
 {
-    if (i440fx_state && env == first_cpu)
-        i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
+    if (smm_set && smm_arg && env == first_cpu)
+        smm_set(!!(env->hflags & HF_SMM_MASK), smm_arg);
 }
 
 
@@ -1095,6 +1106,7 @@ static void pc_init1(ram_addr_t ram_size,
     int bios_size, isa_bios_size, oprom_area_size;
     PCIBus *pci_bus;
     PCIDevice *pci_dev;
+    PCIDevice *i440fx_state;
     int piix3_devfn = -1;
     CPUState *env;
     qemu_irq *cpu_irq;
diff --git a/hw/pc.h b/hw/pc.h
index 9fbae20..bd711ce 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -103,6 +103,9 @@ extern int fd_bootchk;
 void ioport_set_a20(int enable);
 int ioport_get_a20(void);
 
+typedef void (*cpu_set_smm_t)(int smm, void *arg);
+void cpu_smm_register(cpu_set_smm_t callback, void *arg);
+
 /* acpi.c */
 extern int acpi_enabled;
 extern char *acpi_tables;
@@ -126,7 +129,6 @@ int pcspk_audio_init(qemu_irq *pic);
 
 /* piix_pci.c */
 PCIBus *i440fx_init(PCIDevice **pi440fx_state, qemu_irq *pic);
-void i440fx_set_smm(PCIDevice *d, int val);
 int piix3_init(PCIBus *bus, int devfn);
 void i440fx_init_memory_mappings(PCIDevice *d);
 
diff --git a/hw/piix_pci.c b/hw/piix_pci.c
index fce01d4..15f2d5e 100644
--- a/hw/piix_pci.c
+++ b/hw/piix_pci.c
@@ -107,16 +107,16 @@ static void i440fx_update_memory_mappings(PCIDevice *d)
     }
 }
 
-void i440fx_set_smm(PCIDevice *d, int val)
+static void i440fx_set_smm(int smm, void *arg)
 {
-    val = (val != 0);
+    int val = (smm != 0);
+    PCIDevice *d = (PCIDevice*)arg;
     if (smm_enabled != val) {
         smm_enabled = val;
         i440fx_update_memory_mappings(d);
     }
 }
 
-
 /* XXX: suppress when better memory API. We make the assumption that
    no device (in particular the VGA) changes the memory mappings in
    the 0xa0000-0x100000 range */
@@ -202,6 +202,8 @@ PCIBus *i440fx_init(PCIDevice **pi440fx_state, qemu_irq *pic)
     d->config[0x72] = 0x02; /* SMRAM */
 
     register_savevm("I440FX", 0, 2, i440fx_save, i440fx_load, d);
+    cpu_smm_register(&i440fx_set_smm, d);
+
     *pi440fx_state = d;
     return b;
 }
-- 
1.6.0.2

[Qemu-devel] [PATCH 07/17] pc.c: remove unnecessary global variables, pit and ioapic..

[Isaku Yamahata]

remove unnecessary global static variables, pit and ioapic.
They are unnecessarily global so make them local.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
---
 hw/pc.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/pc.c b/hw/pc.c
index bc1c8cf..330d2f0 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -59,8 +59,6 @@
 
 static fdctrl_t *floppy_controller;
 static RTCState *rtc_state;
-static PITState *pit;
-static IOAPICState *ioapic;
 
 typedef struct rom_reset_data {
     uint8_t *data;
@@ -1116,6 +1114,8 @@ static void pc_init1(ram_addr_t ram_size,
     BlockDriverState *fd[MAX_FD];
     int using_vga = cirrus_vga_enabled || std_vga_enabled || vmsvga_enabled;
     void *fw_cfg;
+    PITState *pit;
+    IOAPICState *ioapic = NULL;
 
     if (ram_size >= 0xe0000000 ) {
         above_4g_mem_size = ram_size - 0xe0000000;
-- 
1.6.0.2

[Qemu-devel] [PATCH 08/17] pc.c: remove a global variable, floppy_controller.

[Isaku Yamahata]

Remove a global variable, floppy_controller.
Since it is unnecessarily global, make it local and pass it as
a function argument.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
---
 hw/pc.c |    8 +++++---
 1 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/hw/pc.c b/hw/pc.c
index 330d2f0..6958b8f 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -57,7 +57,6 @@
 
 #define MAX_IDE_BUS 2
 
-static fdctrl_t *floppy_controller;
 static RTCState *rtc_state;
 
 typedef struct rom_reset_data {
@@ -267,7 +266,8 @@ static int pc_boot_set(void *opaque, const char *boot_device)
 
 /* hd_table must contain 4 block drivers */
 static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
-                      const char *boot_device, BlockDriverState **hd_table)
+                      const char *boot_device, BlockDriverState **hd_table,
+                      fdctrl_t *floppy_controller)
 {
     RTCState *s = rtc_state;
     int nbds, bds[3] = { 0, };
@@ -1114,6 +1114,7 @@ static void pc_init1(ram_addr_t ram_size,
     BlockDriverState *fd[MAX_FD];
     int using_vga = cirrus_vga_enabled || std_vga_enabled || vmsvga_enabled;
     void *fw_cfg;
+    fdctrl_t *floppy_controller;
     PITState *pit;
     IOAPICState *ioapic = NULL;
 
@@ -1371,7 +1372,8 @@ static void pc_init1(ram_addr_t ram_size,
     }
     floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);
 
-    cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd);
+    cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd,
+              floppy_controller);
 
     if (pci_enabled && usb_enabled) {
         usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
-- 
1.6.0.2

[Qemu-devel] [PATCH 09/17] pc.c: remove a global variable, RTCState *rtc_state.

[Isaku Yamahata]

remove a global variable, RTCState *rtc_state.
Only the cmos_set_s3_resume_init() needs it global.
So introduce a registering function and make it local.
As for other function which references the variable, pass it
as a function argument.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
---
 hw/pc.c |   25 ++++++++++++++++---------
 hw/pc.h |    6 ++++++
 2 files changed, 22 insertions(+), 9 deletions(-)

diff --git a/hw/pc.c b/hw/pc.c
index 6958b8f..ebbe2ab 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -57,8 +57,6 @@
 
 #define MAX_IDE_BUS 2
 
-static RTCState *rtc_state;
-
 typedef struct rom_reset_data {
     uint8_t *data;
     target_phys_addr_t addr;
@@ -202,9 +200,9 @@ static int cmos_get_fd_drive_type(int fd0)
     return val;
 }
 
-static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
+static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd,
+                         RTCState *s)
 {
-    RTCState *s = rtc_state;
     int cylinders, heads, sectors;
     bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
     rtc_set_memory(s, type_ofs, 47);
@@ -267,9 +265,8 @@ static int pc_boot_set(void *opaque, const char *boot_device)
 /* hd_table must contain 4 block drivers */
 static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
                       const char *boot_device, BlockDriverState **hd_table,
-                      fdctrl_t *floppy_controller)
+                      fdctrl_t *floppy_controller, RTCState *s)
 {
-    RTCState *s = rtc_state;
     int nbds, bds[3] = { 0, };
     int val;
     int fd0, fd1, nb;
@@ -358,9 +355,9 @@ static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
 
     rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
     if (hd_table[0])
-        cmos_init_hd(0x19, 0x1b, hd_table[0]);
+        cmos_init_hd(0x19, 0x1b, hd_table[0], s);
     if (hd_table[1])
-        cmos_init_hd(0x1a, 0x24, hd_table[1]);
+        cmos_init_hd(0x1a, 0x24, hd_table[1], s);
 
     val = 0;
     for (i = 0; i < 4; i++) {
@@ -1115,6 +1112,7 @@ static void pc_init1(ram_addr_t ram_size,
     int using_vga = cirrus_vga_enabled || std_vga_enabled || vmsvga_enabled;
     void *fw_cfg;
     fdctrl_t *floppy_controller;
+    RTCState *rtc_state;
     PITState *pit;
     IOAPICState *ioapic = NULL;
 
@@ -1290,6 +1288,7 @@ static void pc_init1(ram_addr_t ram_size,
     }
 
     rtc_state = rtc_init(0x70, i8259[8], 2000);
+    cmos_set_s3_resume_init(rtc_state);
 
     qemu_register_boot_set(pc_boot_set, rtc_state);
 
@@ -1373,7 +1372,7 @@ static void pc_init1(ram_addr_t ram_size,
     floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);
 
     cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd,
-              floppy_controller);
+              floppy_controller, rtc_state);
 
     if (pci_enabled && usb_enabled) {
         usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
@@ -1461,13 +1460,21 @@ static void pc_init_isa(ram_addr_t ram_size,
              initrd_filename, 0, cpu_model);
 }
 
+#if defined(TARGET_I386)
 /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
    BIOS will read it and start S3 resume at POST Entry */
+static RTCState *rtc_state;
+void cmos_set_s3_resume_init(RTCState *s)
+{
+    rtc_state = s;
+}
+
 void cmos_set_s3_resume(void)
 {
     if (rtc_state)
         rtc_set_memory(rtc_state, 0xF, 0xFE);
 }
+#endif
 
 static QEMUMachine pc_machine = {
     .name = "pc",
diff --git a/hw/pc.h b/hw/pc.h
index bd711ce..a18e558 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -95,7 +95,13 @@ RTCState *rtc_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq,
                       int base_year);
 void rtc_set_memory(RTCState *s, int addr, int val);
 void rtc_set_date(RTCState *s, const struct tm *tm);
+#if defined(TARGET_I386)
+void cmos_set_s3_resume_init(RTCState *s);
 void cmos_set_s3_resume(void);
+#else
+static inline void cmos_set_s3_resume_init(RTCState *s) {}
+static inline void cmos_set_s3_resume(void) {}
+#endif
 
 /* pc.c */
 extern int fd_bootchk;
-- 
1.6.0.2

[Qemu-devel] [PATCH 10/17] pc.c: introduce a function to allocate cpu irq.

[Isaku Yamahata]

Introduce a function, pc_allocate_cpu_irq(), to allocate cpu irq
in order to make pic_irq_request() piix independent.
Later piix code will be split out to another file keeping pic_irq_request()
static.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
---
 hw/pc.c |    7 ++++++-
 1 files changed, 6 insertions(+), 1 deletions(-)

diff --git a/hw/pc.c b/hw/pc.c
index ebbe2ab..31ed6ed 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -1087,6 +1087,11 @@ static CPUState *pc_new_cpu(const char *cpu_model)
     return env;
 }
 
+static qemu_irq *pc_allocate_cpu_irq(void)
+{
+    return qemu_allocate_irqs(pic_irq_request, NULL, 1);
+}
+
 /* PC hardware initialisation */
 static void pc_init1(ram_addr_t ram_size,
                      const char *boot_device,
@@ -1252,7 +1257,7 @@ static void pc_init1(ram_addr_t ram_size,
                                            0xe0000);
     }
 
-    cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1);
+    cpu_irq = pc_allocate_cpu_irq();
     i8259 = i8259_init(cpu_irq[0]);
     ferr_irq = i8259[13];
 
-- 
1.6.0.2

[Qemu-devel] [PATCH 11/17] pc.c: make pc_init1() not refer ferr_irq directly.

[Isaku Yamahata]

By introducing a registering function, make pc_init1() not refer to
ferr_irq directly in order to make ferr_irq piix independent.
Later pc_init1() will be split out into another file keeping ferr_irq
static.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
---
 hw/pc.c |    8 +++++++-
 hw/pc.h |    2 ++
 2 files changed, 9 insertions(+), 1 deletions(-)

diff --git a/hw/pc.c b/hw/pc.c
index 31ed6ed..37cda9b 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -87,6 +87,12 @@ static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
 
 /* MSDOS compatibility mode FPU exception support */
 static qemu_irq ferr_irq;
+
+void pc_register_ferr_irq(qemu_irq irq)
+{
+    ferr_irq = irq;
+}
+
 /* XXX: add IGNNE support */
 void cpu_set_ferr(CPUX86State *s)
 {
@@ -1259,7 +1265,7 @@ static void pc_init1(ram_addr_t ram_size,
 
     cpu_irq = pc_allocate_cpu_irq();
     i8259 = i8259_init(cpu_irq[0]);
-    ferr_irq = i8259[13];
+    pc_register_ferr_irq(i8259[13]);
 
     if (pci_enabled) {
         pci_bus = i440fx_init(&i440fx_state, i8259);
diff --git a/hw/pc.h b/hw/pc.h
index a18e558..f5f84ad 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -106,6 +106,8 @@ static inline void cmos_set_s3_resume(void) {}
 /* pc.c */
 extern int fd_bootchk;
 
+void pc_register_ferr_irq(qemu_irq irq);
+
 void ioport_set_a20(int enable);
 int ioport_get_a20(void);
 
-- 
1.6.0.2

[Qemu-devel] [PATCH 12/17] pc.c: split out cpu initialization from pc_init1() into pc_cpus_init().

[Isaku Yamahata]

split out cpu initialization which is piix independent from pc_init1()
into pc_cpus_init(). Later it will be used.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
---
 hw/pc.c |   32 +++++++++++++++++++-------------
 1 files changed, 19 insertions(+), 13 deletions(-)

diff --git a/hw/pc.c b/hw/pc.c
index 37cda9b..50eb597 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -1093,6 +1093,24 @@ static CPUState *pc_new_cpu(const char *cpu_model)
     return env;
 }
 
+static void pc_cpus_init(const char *cpu_model)
+{
+    int i;
+
+    /* init CPUs */
+    if (cpu_model == NULL) {
+#ifdef TARGET_X86_64
+        cpu_model = "qemu64";
+#else
+        cpu_model = "qemu32";
+#endif
+    }
+
+    for(i = 0; i < smp_cpus; i++) {
+        (void)pc_new_cpu(cpu_model);
+    }
+}
+
 static qemu_irq *pc_allocate_cpu_irq(void)
 {
     return qemu_allocate_irqs(pic_irq_request, NULL, 1);
@@ -1114,7 +1132,6 @@ static void pc_init1(ram_addr_t ram_size,
     PCIDevice *pci_dev;
     PCIDevice *i440fx_state;
     int piix3_devfn = -1;
-    CPUState *env;
     qemu_irq *cpu_irq;
     qemu_irq *i8259;
     int index;
@@ -1136,18 +1153,7 @@ static void pc_init1(ram_addr_t ram_size,
 
     linux_boot = (kernel_filename != NULL);
 
-    /* init CPUs */
-    if (cpu_model == NULL) {
-#ifdef TARGET_X86_64
-        cpu_model = "qemu64";
-#else
-        cpu_model = "qemu32";
-#endif
-    }
-
-    for (i = 0; i < smp_cpus; i++) {
-        env = pc_new_cpu(cpu_model);
-    }
+    pc_cpus_init(cpu_model);
 
     vmport_init();
 
-- 
1.6.0.2

[Qemu-devel] [PATCH 13/17] pc.c: split out memory allocation from pc_init1() into pc_memory_init()

[Isaku Yamahata]

Split out memory allocation and rom/bios loading which doesn't depend
on piix from pc_init1() into pc_memory_init().
Later it will be used.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
---
 hw/pc.c |   73 ++++++++++++++++++++++++++++++++++++++------------------------
 1 files changed, 45 insertions(+), 28 deletions(-)

diff --git a/hw/pc.c b/hw/pc.c
index 50eb597..ebd35e2 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -1111,38 +1111,20 @@ static void pc_cpus_init(const char *cpu_model)
     }
 }
 
-static qemu_irq *pc_allocate_cpu_irq(void)
-{
-    return qemu_allocate_irqs(pic_irq_request, NULL, 1);
-}
-
-/* PC hardware initialisation */
-static void pc_init1(ram_addr_t ram_size,
-                     const char *boot_device,
-                     const char *kernel_filename, const char *kernel_cmdline,
-                     const char *initrd_filename,
-                     int pci_enabled, const char *cpu_model)
+static void pc_memory_init(ram_addr_t ram_size,
+                           const char *kernel_filename,
+                           const char *kernel_cmdline,
+                           const char *initrd_filename,
+                           ram_addr_t *below_4g_mem_size_p,
+                           ram_addr_t *above_4g_mem_size_p)
 {
     char *filename;
     int ret, linux_boot, i;
     ram_addr_t ram_addr, bios_offset, option_rom_offset;
     ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
     int bios_size, isa_bios_size, oprom_area_size;
-    PCIBus *pci_bus;
-    PCIDevice *pci_dev;
-    PCIDevice *i440fx_state;
-    int piix3_devfn = -1;
-    qemu_irq *cpu_irq;
-    qemu_irq *i8259;
-    int index;
-    BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
-    BlockDriverState *fd[MAX_FD];
     int using_vga = cirrus_vga_enabled || std_vga_enabled || vmsvga_enabled;
     void *fw_cfg;
-    fdctrl_t *floppy_controller;
-    RTCState *rtc_state;
-    PITState *pit;
-    IOAPICState *ioapic = NULL;
 
     if (ram_size >= 0xe0000000 ) {
         above_4g_mem_size = ram_size - 0xe0000000;
@@ -1150,13 +1132,11 @@ static void pc_init1(ram_addr_t ram_size,
     } else {
         below_4g_mem_size = ram_size;
     }
+    *above_4g_mem_size_p = above_4g_mem_size;
+    *below_4g_mem_size_p = below_4g_mem_size;
 
     linux_boot = (kernel_filename != NULL);
 
-    pc_cpus_init(cpu_model);
-
-    vmport_init();
-
     /* allocate RAM */
     ram_addr = qemu_ram_alloc(0xa0000);
     cpu_register_physical_memory(0, 0xa0000, ram_addr);
@@ -1268,6 +1248,43 @@ static void pc_init1(ram_addr_t ram_size,
         oprom_area_size += load_option_rom(nic_oprom, 0xc0000 + oprom_area_size,
                                            0xe0000);
     }
+}
+
+static qemu_irq *pc_allocate_cpu_irq(void)
+{
+    return qemu_allocate_irqs(pic_irq_request, NULL, 1);
+}
+
+/* PC hardware initialisation */
+static void pc_init1(ram_addr_t ram_size,
+                     const char *boot_device,
+                     const char *kernel_filename, const char *kernel_cmdline,
+                     const char *initrd_filename,
+                     int pci_enabled, const char *cpu_model)
+{
+    int i;
+    ram_addr_t below_4g_mem_size, above_4g_mem_size;
+    PCIBus *pci_bus;
+    PCIDevice *pci_dev;
+    PCIDevice *i440fx_state;
+    int piix3_devfn = -1;
+    qemu_irq *cpu_irq;
+    qemu_irq *i8259;
+    int index;
+    BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
+    BlockDriverState *fd[MAX_FD];
+    fdctrl_t *floppy_controller;
+    RTCState *rtc_state;
+    PITState *pit;
+    IOAPICState *ioapic = NULL;
+
+    pc_cpus_init(cpu_model);
+
+    vmport_init();
+
+    /* allocate ram and load rom/bios */
+    pc_memory_init(ram_size, kernel_filename, kernel_cmdline, initrd_filename,
+                   &below_4g_mem_size, &above_4g_mem_size);
 
     cpu_irq = pc_allocate_cpu_irq();
     i8259 = i8259_init(cpu_irq[0]);
-- 
1.6.0.2

[Qemu-devel] [PATCH 14/17] pc.c: split out vga initialization from pc_init1() into pc_vga_init().

[Isaku Yamahata]

Split out vga initialization which is independent of piix
from pc_init1() as pc_vga_init().
Later it will be used.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
---
 hw/pc.c |   41 +++++++++++++++++++++++------------------
 1 files changed, 23 insertions(+), 18 deletions(-)

diff --git a/hw/pc.c b/hw/pc.c
index ebd35e2..a3ce1b5 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -1255,6 +1255,28 @@ static qemu_irq *pc_allocate_cpu_irq(void)
     return qemu_allocate_irqs(pic_irq_request, NULL, 1);
 }
 
+static void pc_vga_init(PCIBus *pci_bus)
+{
+    if (cirrus_vga_enabled) {
+        if (pci_bus) {
+            pci_cirrus_vga_init(pci_bus);
+        } else {
+            isa_cirrus_vga_init();
+        }
+    } else if (vmsvga_enabled) {
+        if (pci_bus)
+            pci_vmsvga_init(pci_bus);
+        else
+            fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
+    } else if (std_vga_enabled) {
+        if (pci_bus) {
+            pci_vga_init(pci_bus, 0, 0);
+        } else {
+            isa_vga_init();
+        }
+    }
+}
+
 /* PC hardware initialisation */
 static void pc_init1(ram_addr_t ram_size,
                      const char *boot_device,
@@ -1302,24 +1324,7 @@ static void pc_init1(ram_addr_t ram_size,
 
     register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
 
-    if (cirrus_vga_enabled) {
-        if (pci_enabled) {
-            pci_cirrus_vga_init(pci_bus);
-        } else {
-            isa_cirrus_vga_init();
-        }
-    } else if (vmsvga_enabled) {
-        if (pci_enabled)
-            pci_vmsvga_init(pci_bus);
-        else
-            fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
-    } else if (std_vga_enabled) {
-        if (pci_enabled) {
-            pci_vga_init(pci_bus, 0, 0);
-        } else {
-            isa_vga_init();
-        }
-    }
+    pc_vga_init(pci_enabled? pci_bus: NULL);
 
     rtc_state = rtc_init(0x70, i8259[8], 2000);
     cmos_set_s3_resume_init(rtc_state);
-- 
1.6.0.2

[Qemu-devel] [PATCH 15/17] pc.c: split out basic device init from pc_init1() into pc_basic_device_init()

[Isaku Yamahata]

Split out basic device, i.e. legacy devices like floppy, initialization
from pc_init1() into pc_basic_device_init().
Later it will be used.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
---
 hw/pc.c |  103 +++++++++++++++++++++++++++++++++-----------------------------
 1 files changed, 55 insertions(+), 48 deletions(-)

diff --git a/hw/pc.c b/hw/pc.c
index a3ce1b5..f5ff462 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -1277,6 +1277,58 @@ static void pc_vga_init(PCIBus *pci_bus)
     }
 }
 
+static void pc_basic_device_init(qemu_irq *i8259,
+                                 fdctrl_t **floppy_controller,
+                                 RTCState **rtc_state)
+{
+    int i;
+    BlockDriverState *fd[MAX_FD];
+    PITState *pit;
+
+    register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
+
+    register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
+
+    *rtc_state = rtc_init(0x70, i8259[8], 2000);
+    cmos_set_s3_resume_init(*rtc_state);
+
+    qemu_register_boot_set(pc_boot_set, *rtc_state);
+
+    register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
+    register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
+
+    pit = pit_init(0x40, i8259[0]);
+    pcspk_init(pit);
+    if (!no_hpet) {
+        hpet_init(i8259);
+    }
+
+    for(i = 0; i < MAX_SERIAL_PORTS; i++) {
+        if (serial_hds[i]) {
+            serial_init(serial_io[i], i8259[serial_irq[i]], 115200,
+                        serial_hds[i]);
+        }
+    }
+
+    for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
+        if (parallel_hds[i]) {
+            parallel_init(parallel_io[i], i8259[parallel_irq[i]],
+                          parallel_hds[i]);
+        }
+    }
+
+    i8042_init(i8259[1], i8259[12], 0x60);
+    DMA_init(0);
+    for(i = 0; i < MAX_FD; i++) {
+        int index = drive_get_index(IF_FLOPPY, 0, i);
+	if (index != -1)
+	    fd[i] = drives_table[index].bdrv;
+	else
+	    fd[i] = NULL;
+    }
+    *floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);
+}
+
 /* PC hardware initialisation */
 static void pc_init1(ram_addr_t ram_size,
                      const char *boot_device,
@@ -1294,11 +1346,8 @@ static void pc_init1(ram_addr_t ram_size,
     qemu_irq *i8259;
     int index;
     BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
-    BlockDriverState *fd[MAX_FD];
     fdctrl_t *floppy_controller;
     RTCState *rtc_state;
-    PITState *pit;
-    IOAPICState *ioapic = NULL;
 
     pc_cpus_init(cpu_model);
 
@@ -1319,47 +1368,16 @@ static void pc_init1(ram_addr_t ram_size,
         pci_bus = NULL;
     }
 
-    /* init basic PC hardware */
-    register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
-
-    register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
-
     pc_vga_init(pci_enabled? pci_bus: NULL);
 
-    rtc_state = rtc_init(0x70, i8259[8], 2000);
-    cmos_set_s3_resume_init(rtc_state);
-
-    qemu_register_boot_set(pc_boot_set, rtc_state);
-
-    register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
-    register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
+    /* init basic PC hardware */
+    pc_basic_device_init(i8259, &floppy_controller, &rtc_state);
 
     if (pci_enabled) {
-        ioapic = ioapic_init();
-    }
-    pit = pit_init(0x40, i8259[0]);
-    pcspk_init(pit);
-    if (!no_hpet) {
-        hpet_init(i8259);
-    }
-    if (pci_enabled) {
+        IOAPICState *ioapic = ioapic_init();
         pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
     }
 
-    for(i = 0; i < MAX_SERIAL_PORTS; i++) {
-        if (serial_hds[i]) {
-            serial_init(serial_io[i], i8259[serial_irq[i]], 115200,
-                        serial_hds[i]);
-        }
-    }
-
-    for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
-        if (parallel_hds[i]) {
-            parallel_init(parallel_io[i], i8259[parallel_irq[i]],
-                          parallel_hds[i]);
-        }
-    }
-
     watchdog_pc_init(pci_bus);
 
     for(i = 0; i < nb_nics; i++) {
@@ -1395,21 +1413,10 @@ static void pc_init1(ram_addr_t ram_size,
         }
     }
 
-    i8042_init(i8259[1], i8259[12], 0x60);
-    DMA_init(0);
 #ifdef HAS_AUDIO
     audio_init(pci_enabled ? pci_bus : NULL, i8259);
 #endif
 
-    for(i = 0; i < MAX_FD; i++) {
-        index = drive_get_index(IF_FLOPPY, 0, i);
-	if (index != -1)
-	    fd[i] = drives_table[index].bdrv;
-	else
-	    fd[i] = NULL;
-    }
-    floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);
-
     cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd,
               floppy_controller, rtc_state);
 
-- 
1.6.0.2

[Qemu-devel] [PATCH 16/17] pc.c: split out pci device init from pc_init1() into pc_pci_device_init()

[Isaku Yamahata]

Split out pci device initialization from pc_init1() into pc_pci_device_init().

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
---
 hw/pc.c |   81 +++++++++++++++++++++++++++++++++++----------------------------
 1 files changed, 45 insertions(+), 36 deletions(-)

diff --git a/hw/pc.c b/hw/pc.c
index f5ff462..211b803 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -1329,6 +1329,50 @@ static void pc_basic_device_init(qemu_irq *i8259,
     *floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);
 }
 
+static void pc_pci_device_init(PCIBus *pci_bus)
+{
+    PCIDevice *pci_dev;
+
+    {
+	int max_bus;
+        int bus;
+
+        max_bus = drive_get_max_bus(IF_SCSI);
+	for (bus = 0; bus <= max_bus; bus++) {
+            pci_create_simple(pci_bus, -1, "lsi53c895a");
+        }
+    }
+
+    /* Add virtio block devices */
+    {
+        int index;
+        int unit_id = 0;
+
+        while ((index = drive_get_index(IF_VIRTIO, 0, unit_id)) != -1) {
+            pci_dev = pci_create("virtio-blk-pci",
+                                 drives_table[index].devaddr);
+            qdev_init(&pci_dev->qdev);
+            unit_id++;
+        }
+    }
+
+    /* Add virtio balloon device */
+    if (!virtio_balloon) {
+        pci_dev = pci_create("virtio-balloon-pci", virtio_balloon_devaddr);
+        qdev_init(&pci_dev->qdev);
+    }
+
+    /* Add virtio console devices */
+    {
+        int i;
+        for(i = 0; i < MAX_VIRTIO_CONSOLES; i++) {
+            if (virtcon_hds[i]) {
+                pci_create_simple(pci_bus, -1, "virtio-console-pci");
+            }
+        }
+    }
+}
+
 /* PC hardware initialisation */
 static void pc_init1(ram_addr_t ram_size,
                      const char *boot_device,
@@ -1339,7 +1383,6 @@ static void pc_init1(ram_addr_t ram_size,
     int i;
     ram_addr_t below_4g_mem_size, above_4g_mem_size;
     PCIBus *pci_bus;
-    PCIDevice *pci_dev;
     PCIDevice *i440fx_state;
     int piix3_devfn = -1;
     qemu_irq *cpu_irq;
@@ -1444,41 +1487,7 @@ static void pc_init1(ram_addr_t ram_size,
     }
 
     if (pci_enabled) {
-	int max_bus;
-        int bus;
-
-        max_bus = drive_get_max_bus(IF_SCSI);
-	for (bus = 0; bus <= max_bus; bus++) {
-            pci_create_simple(pci_bus, -1, "lsi53c895a");
-        }
-    }
-
-    /* Add virtio block devices */
-    if (pci_enabled) {
-        int index;
-        int unit_id = 0;
-
-        while ((index = drive_get_index(IF_VIRTIO, 0, unit_id)) != -1) {
-            pci_dev = pci_create("virtio-blk-pci",
-                                 drives_table[index].devaddr);
-            qdev_init(&pci_dev->qdev);
-            unit_id++;
-        }
-    }
-
-    /* Add virtio balloon device */
-    if (pci_enabled && virtio_balloon) {
-        pci_dev = pci_create("virtio-balloon-pci", virtio_balloon_devaddr);
-        qdev_init(&pci_dev->qdev);
-    }
-
-    /* Add virtio console devices */
-    if (pci_enabled) {
-        for(i = 0; i < MAX_VIRTIO_CONSOLES; i++) {
-            if (virtcon_hds[i]) {
-                pci_create_simple(pci_bus, -1, "virtio-console-pci");
-            }
-        }
+        pc_pci_device_init(pci_bus);
     }
 }
 
-- 
1.6.0.2

[Qemu-devel] [PATCH 17/17] pc.c: split out piix specific part from pc.c into pc_piix.c

[Isaku Yamahata]

Finally, we can safely split out the piix specific part from pc.c
into pc_piix.c.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
---
 Makefile.target |    2 +-
 hw/pc.c         |  207 +++++-------------------------------------------------
 hw/pc.h         |   22 ++++++
 hw/pc_piix.c    |  210 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
 4 files changed, 251 insertions(+), 190 deletions(-)
 create mode 100644 hw/pc_piix.c

diff --git a/Makefile.target b/Makefile.target
index 4f8dd35..f6534db 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -567,7 +567,7 @@ obj-y += fdc.o mc146818rtc.o serial.o i8259.o i8254.o pcspk.o pc.o
 obj-y += cirrus_vga.o apic.o ioapic.o parallel.o acpi.o piix_pci.o
 obj-y += usb-uhci.o vmmouse.o vmport.o vmware_vga.o hpet.o
 obj-y += device-hotplug.o pci-hotplug.o smbios.o
-obj-y += pc_smbus.o pc_apm.o acpi_piix4.o
+obj-y += pc_smbus.o pc_apm.o acpi_piix4.o pc_piix.o
 CPPFLAGS += -DHAS_AUDIO -DHAS_AUDIO_CHOICE
 endif
 ifeq ($(TARGET_BASE_ARCH), ppc)
diff --git a/hw/pc.c b/hw/pc.c
index 211b803..a0fef0a 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -55,8 +55,6 @@
 #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
 #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
 
-#define MAX_IDE_BUS 2
-
 typedef struct rom_reset_data {
     uint8_t *data;
     target_phys_addr_t addr;
@@ -269,9 +267,9 @@ static int pc_boot_set(void *opaque, const char *boot_device)
 }
 
 /* hd_table must contain 4 block drivers */
-static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
-                      const char *boot_device, BlockDriverState **hd_table,
-                      fdctrl_t *floppy_controller, RTCState *s)
+void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
+                  const char *boot_device, BlockDriverState **hd_table,
+                  fdctrl_t *floppy_controller, RTCState *s)
 {
     int nbds, bds[3] = { 0, };
     int val;
@@ -996,10 +994,6 @@ static void load_linux(void *fw_cfg,
     generate_bootsect(option_rom, gpr, seg, 0);
 }
 
-static const int ide_iobase[2] = { 0x1f0, 0x170 };
-static const int ide_iobase2[2] = { 0x3f6, 0x376 };
-static const int ide_irq[2] = { 14, 15 };
-
 #define NE2000_NB_MAX 6
 
 static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
@@ -1012,7 +1006,7 @@ static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
 static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
 
 #ifdef HAS_AUDIO
-static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
+void audio_init (PCIBus *pci_bus, qemu_irq *pic)
 {
     struct soundhw *c;
 
@@ -1030,7 +1024,7 @@ static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
 }
 #endif
 
-static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic)
+void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic)
 {
     static int nb_ne2k = 0;
 
@@ -1093,7 +1087,7 @@ static CPUState *pc_new_cpu(const char *cpu_model)
     return env;
 }
 
-static void pc_cpus_init(const char *cpu_model)
+void pc_cpus_init(const char *cpu_model)
 {
     int i;
 
@@ -1111,12 +1105,12 @@ static void pc_cpus_init(const char *cpu_model)
     }
 }
 
-static void pc_memory_init(ram_addr_t ram_size,
-                           const char *kernel_filename,
-                           const char *kernel_cmdline,
-                           const char *initrd_filename,
-                           ram_addr_t *below_4g_mem_size_p,
-                           ram_addr_t *above_4g_mem_size_p)
+void pc_memory_init(ram_addr_t ram_size,
+                    const char *kernel_filename,
+                    const char *kernel_cmdline,
+                    const char *initrd_filename,
+                    ram_addr_t *below_4g_mem_size_p,
+                    ram_addr_t *above_4g_mem_size_p)
 {
     char *filename;
     int ret, linux_boot, i;
@@ -1250,12 +1244,12 @@ static void pc_memory_init(ram_addr_t ram_size,
     }
 }
 
-static qemu_irq *pc_allocate_cpu_irq(void)
+qemu_irq *pc_allocate_cpu_irq(void)
 {
     return qemu_allocate_irqs(pic_irq_request, NULL, 1);
 }
 
-static void pc_vga_init(PCIBus *pci_bus)
+void pc_vga_init(PCIBus *pci_bus)
 {
     if (cirrus_vga_enabled) {
         if (pci_bus) {
@@ -1277,9 +1271,9 @@ static void pc_vga_init(PCIBus *pci_bus)
     }
 }
 
-static void pc_basic_device_init(qemu_irq *i8259,
-                                 fdctrl_t **floppy_controller,
-                                 RTCState **rtc_state)
+void pc_basic_device_init(qemu_irq *i8259,
+                          fdctrl_t **floppy_controller,
+                          RTCState **rtc_state)
 {
     int i;
     BlockDriverState *fd[MAX_FD];
@@ -1329,7 +1323,7 @@ static void pc_basic_device_init(qemu_irq *i8259,
     *floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);
 }
 
-static void pc_pci_device_init(PCIBus *pci_bus)
+void pc_pci_device_init(PCIBus *pci_bus)
 {
     PCIDevice *pci_dev;
 
@@ -1373,148 +1367,6 @@ static void pc_pci_device_init(PCIBus *pci_bus)
     }
 }
 
-/* PC hardware initialisation */
-static void pc_init1(ram_addr_t ram_size,
-                     const char *boot_device,
-                     const char *kernel_filename, const char *kernel_cmdline,
-                     const char *initrd_filename,
-                     int pci_enabled, const char *cpu_model)
-{
-    int i;
-    ram_addr_t below_4g_mem_size, above_4g_mem_size;
-    PCIBus *pci_bus;
-    PCIDevice *i440fx_state;
-    int piix3_devfn = -1;
-    qemu_irq *cpu_irq;
-    qemu_irq *i8259;
-    int index;
-    BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
-    fdctrl_t *floppy_controller;
-    RTCState *rtc_state;
-
-    pc_cpus_init(cpu_model);
-
-    vmport_init();
-
-    /* allocate ram and load rom/bios */
-    pc_memory_init(ram_size, kernel_filename, kernel_cmdline, initrd_filename,
-                   &below_4g_mem_size, &above_4g_mem_size);
-
-    cpu_irq = pc_allocate_cpu_irq();
-    i8259 = i8259_init(cpu_irq[0]);
-    pc_register_ferr_irq(i8259[13]);
-
-    if (pci_enabled) {
-        pci_bus = i440fx_init(&i440fx_state, i8259);
-        piix3_devfn = piix3_init(pci_bus, -1);
-    } else {
-        pci_bus = NULL;
-    }
-
-    pc_vga_init(pci_enabled? pci_bus: NULL);
-
-    /* init basic PC hardware */
-    pc_basic_device_init(i8259, &floppy_controller, &rtc_state);
-
-    if (pci_enabled) {
-        IOAPICState *ioapic = ioapic_init();
-        pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
-    }
-
-    watchdog_pc_init(pci_bus);
-
-    for(i = 0; i < nb_nics; i++) {
-        NICInfo *nd = &nd_table[i];
-
-        if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
-            pc_init_ne2k_isa(nd, i8259);
-        else
-            pci_nic_init(nd, "ne2k_pci", NULL);
-    }
-
-    piix4_acpi_system_hot_add_init();
-
-    if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
-        fprintf(stderr, "qemu: too many IDE bus\n");
-        exit(1);
-    }
-
-    for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
-        index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
-	if (index != -1)
-	    hd[i] = drives_table[index].bdrv;
-	else
-	    hd[i] = NULL;
-    }
-
-    if (pci_enabled) {
-        pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, i8259);
-    } else {
-        for(i = 0; i < MAX_IDE_BUS; i++) {
-            isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
-	                 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
-        }
-    }
-
-#ifdef HAS_AUDIO
-    audio_init(pci_enabled ? pci_bus : NULL, i8259);
-#endif
-
-    cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd,
-              floppy_controller, rtc_state);
-
-    if (pci_enabled && usb_enabled) {
-        usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
-    }
-
-    if (pci_enabled && acpi_enabled) {
-        uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
-        i2c_bus *smbus;
-
-        /* TODO: Populate SPD eeprom data.  */
-        smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, i8259[9]);
-        for (i = 0; i < 8; i++) {
-            DeviceState *eeprom;
-            eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
-            qdev_set_prop_int(eeprom, "address", 0x50 + i);
-            qdev_set_prop_ptr(eeprom, "data", eeprom_buf + (i * 256));
-            qdev_init(eeprom);
-        }
-    }
-
-    if (i440fx_state) {
-        i440fx_init_memory_mappings(i440fx_state);
-    }
-
-    if (pci_enabled) {
-        pc_pci_device_init(pci_bus);
-    }
-}
-
-static void pc_init_pci(ram_addr_t ram_size,
-                        const char *boot_device,
-                        const char *kernel_filename,
-                        const char *kernel_cmdline,
-                        const char *initrd_filename,
-                        const char *cpu_model)
-{
-    pc_init1(ram_size, boot_device,
-             kernel_filename, kernel_cmdline,
-             initrd_filename, 1, cpu_model);
-}
-
-static void pc_init_isa(ram_addr_t ram_size,
-                        const char *boot_device,
-                        const char *kernel_filename,
-                        const char *kernel_cmdline,
-                        const char *initrd_filename,
-                        const char *cpu_model)
-{
-    pc_init1(ram_size, boot_device,
-             kernel_filename, kernel_cmdline,
-             initrd_filename, 0, cpu_model);
-}
-
 #if defined(TARGET_I386)
 /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
    BIOS will read it and start S3 resume at POST Entry */
@@ -1530,26 +1382,3 @@ void cmos_set_s3_resume(void)
         rtc_set_memory(rtc_state, 0xF, 0xFE);
 }
 #endif
-
-static QEMUMachine pc_machine = {
-    .name = "pc",
-    .desc = "Standard PC",
-    .init = pc_init_pci,
-    .max_cpus = 255,
-    .is_default = 1,
-};
-
-static QEMUMachine isapc_machine = {
-    .name = "isapc",
-    .desc = "ISA-only PC",
-    .init = pc_init_isa,
-    .max_cpus = 1,
-};
-
-static void pc_machine_init(void)
-{
-    qemu_register_machine(&pc_machine);
-    qemu_register_machine(&isapc_machine);
-}
-
-machine_init(pc_machine_init);
diff --git a/hw/pc.h b/hw/pc.h
index f5f84ad..b1bb829 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -108,6 +108,28 @@ extern int fd_bootchk;
 
 void pc_register_ferr_irq(qemu_irq irq);
 
+void pc_cpus_init(const char *cpu_model);
+void pc_memory_init(ram_addr_t ram_size,
+                    const char *kernel_filename,
+                    const char *kernel_cmdline,
+                    const char *initrd_filename,
+                    ram_addr_t *below_4g_mem_size_p,
+                    ram_addr_t *above_4g_mem_size_p);
+qemu_irq *pc_allocate_cpu_irq(void);
+void pc_vga_init(PCIBus *pci_bus);
+struct fdctrl_t;
+void pc_basic_device_init(qemu_irq *i8259,
+                          struct fdctrl_t **floppy_controller,
+                          RTCState **rtc_state);
+void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic);
+#ifdef HAS_AUDIO
+void audio_init (PCIBus *pci_bus, qemu_irq *pic);
+#endif
+void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
+                  const char *boot_device, BlockDriverState **hd_table,
+                  struct fdctrl_t *floppy_controller, RTCState *s);
+void pc_pci_device_init(PCIBus *pci_bus);
+
 void ioport_set_a20(int enable);
 int ioport_get_a20(void);
 
diff --git a/hw/pc_piix.c b/hw/pc_piix.c
new file mode 100644
index 0000000..d56337b
--- /dev/null
+++ b/hw/pc_piix.c
@@ -0,0 +1,210 @@
+/*
+ * QEMU PC System Emulator
+ *
+ * Copyright (c) 2003-2004 Fabrice Bellard
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "hw.h"
+#include "pc.h"
+#include "fdc.h"
+#include "pci.h"
+#include "block.h"
+#include "sysemu.h"
+#include "audio/audio.h"
+#include "net.h"
+#include "smbus.h"
+#include "boards.h"
+#include "monitor.h"
+#include "fw_cfg.h"
+#include "hpet_emul.h"
+#include "watchdog.h"
+#include "smbios.h"
+
+#define MAX_IDE_BUS 2
+
+static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
+static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
+static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
+
+/* PC hardware initialisation */
+static void pc_init1(ram_addr_t ram_size,
+                     const char *boot_device,
+                     const char *kernel_filename, const char *kernel_cmdline,
+                     const char *initrd_filename,
+                     int pci_enabled, const char *cpu_model)
+{
+    int i;
+    ram_addr_t below_4g_mem_size, above_4g_mem_size;
+    PCIBus *pci_bus;
+    PCIDevice *i440fx_state;
+    int piix3_devfn = -1;
+    qemu_irq *cpu_irq;
+    qemu_irq *i8259;
+    int index;
+    BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
+    fdctrl_t *floppy_controller;
+    RTCState *rtc_state;
+
+    pc_cpus_init(cpu_model);
+
+    vmport_init();
+
+    /* allocate ram and load rom/bios */
+    pc_memory_init(ram_size, kernel_filename, kernel_cmdline, initrd_filename,
+                   &below_4g_mem_size, &above_4g_mem_size);
+
+    cpu_irq = pc_allocate_cpu_irq();
+    i8259 = i8259_init(cpu_irq[0]);
+    pc_register_ferr_irq(i8259[13]);
+
+    if (pci_enabled) {
+        pci_bus = i440fx_init(&i440fx_state, i8259);
+        piix3_devfn = piix3_init(pci_bus, -1);
+    } else {
+        pci_bus = NULL;
+    }
+
+    pc_vga_init(pci_enabled? pci_bus: NULL);
+
+    /* init basic PC hardware */
+    pc_basic_device_init(i8259, &floppy_controller, &rtc_state);
+
+    if (pci_enabled) {
+        IOAPICState *ioapic = ioapic_init();
+        pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
+    }
+
+    watchdog_pc_init(pci_bus);
+
+    for(i = 0; i < nb_nics; i++) {
+        NICInfo *nd = &nd_table[i];
+
+        if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
+            pc_init_ne2k_isa(nd, i8259);
+        else
+            pci_nic_init(nd, "ne2k_pci", NULL);
+    }
+
+    piix4_acpi_system_hot_add_init();
+
+    if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
+        fprintf(stderr, "qemu: too many IDE bus\n");
+        exit(1);
+    }
+
+    for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
+        index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
+	if (index != -1)
+	    hd[i] = drives_table[index].bdrv;
+	else
+	    hd[i] = NULL;
+    }
+
+    if (pci_enabled) {
+        pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, i8259);
+    } else {
+        for(i = 0; i < MAX_IDE_BUS; i++) {
+            isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
+	                 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
+        }
+    }
+
+#ifdef HAS_AUDIO
+    audio_init(pci_enabled ? pci_bus : NULL, i8259);
+#endif
+
+    pc_cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd,
+                 floppy_controller, rtc_state);
+
+    if (pci_enabled && usb_enabled) {
+        usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
+    }
+
+    if (pci_enabled && acpi_enabled) {
+        uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
+        i2c_bus *smbus;
+
+        /* TODO: Populate SPD eeprom data.  */
+        smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, i8259[9]);
+        for (i = 0; i < 8; i++) {
+            DeviceState *eeprom;
+            eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
+            qdev_set_prop_int(eeprom, "address", 0x50 + i);
+            qdev_set_prop_ptr(eeprom, "data", eeprom_buf + (i * 256));
+            qdev_init(eeprom);
+        }
+    }
+
+    if (i440fx_state) {
+        i440fx_init_memory_mappings(i440fx_state);
+    }
+
+    if (pci_enabled) {
+        pc_pci_device_init(pci_bus);
+    }
+}
+
+static void pc_init_pci(ram_addr_t ram_size,
+                        const char *boot_device,
+                        const char *kernel_filename,
+                        const char *kernel_cmdline,
+                        const char *initrd_filename,
+                        const char *cpu_model)
+{
+    pc_init1(ram_size, boot_device,
+             kernel_filename, kernel_cmdline,
+             initrd_filename, 1, cpu_model);
+}
+
+static void pc_init_isa(ram_addr_t ram_size,
+                        const char *boot_device,
+                        const char *kernel_filename,
+                        const char *kernel_cmdline,
+                        const char *initrd_filename,
+                        const char *cpu_model)
+{
+    pc_init1(ram_size, boot_device,
+             kernel_filename, kernel_cmdline,
+             initrd_filename, 0, cpu_model);
+}
+
+static QEMUMachine pc_machine = {
+    .name = "pc",
+    .desc = "Standard PC",
+    .init = pc_init_pci,
+    .max_cpus = 255,
+    .is_default = 1,
+};
+
+static QEMUMachine isapc_machine = {
+    .name = "isapc",
+    .desc = "ISA-only PC",
+    .init = pc_init_isa,
+    .max_cpus = 1,
+};
+
+static void pc_machine_init(void)
+{
+    qemu_register_machine(&pc_machine);
+    qemu_register_machine(&isapc_machine);
+}
+
+machine_init(pc_machine_init);
-- 
1.6.0.2

[Qemu-devel] Re: [PATCH 09/17] pc.c: remove a global variable, RTCState *rtc_state.

[Paolo Bonzini]

On 07/03/2009 09:11 AM, Isaku Yamahata wrote:
> +#if defined(TARGET_I386)
>   /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
>      BIOS will read it and start S3 resume at POST Entry */
> +static RTCState *rtc_state;
> +void cmos_set_s3_resume_init(RTCState *s)
> +{
> +    rtc_state = s;
> +}
> +
>   void cmos_set_s3_resume(void)
>   {
>       if (rtc_state)
>           rtc_set_memory(rtc_state, 0xF, 0xFE);
>   }
> +#endif

Comment above the wrong function.  Also, rather than defining it only 
for TARGET_I386, I would #ifdef just the body if cmos_set_s3_resume for 
cleanliness.

Paolo

[Qemu-devel] Re: [PATCH 09/17] pc.c: remove a global variable, RTCState *rtc_state.

[Isaku Yamahata]

On Wed, Jul 08, 2009 at 09:44:31AM +0200, Paolo Bonzini wrote:
> On 07/03/2009 09:11 AM, Isaku Yamahata wrote:
> >+#if defined(TARGET_I386)
> >  /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
> >     BIOS will read it and start S3 resume at POST Entry */
> >+static RTCState *rtc_state;
> >+void cmos_set_s3_resume_init(RTCState *s)
> >+{
> >+    rtc_state = s;
> >+}
> >+
> >  void cmos_set_s3_resume(void)
> >  {
> >      if (rtc_state)
> >          rtc_set_memory(rtc_state, 0xF, 0xFE);
> >  }
> >+#endif
> 
> Comment above the wrong function.  Also, rather than defining it only 
> for TARGET_I386, I would #ifdef just the body if cmos_set_s3_resume for 
> cleanliness.

The case you pointed out is handled in pc.h. 
Or are you suggesting that they should be defined in pc.c even when
TARGET_I386 isn't defined?

thanks,

diff --git a/hw/pc.h b/hw/pc.h
index bd711ce..a18e558 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -95,7 +95,13 @@ RTCState *rtc_mm_init(target_phys_addr_t base, int it_shift,
+qemu_irq irq,
                       int base_year);
 void rtc_set_memory(RTCState *s, int addr, int val);
 void rtc_set_date(RTCState *s, const struct tm *tm);
+#if defined(TARGET_I386)
+void cmos_set_s3_resume_init(RTCState *s);
 void cmos_set_s3_resume(void);
+#else
+static inline void cmos_set_s3_resume_init(RTCState *s) {}
+static inline void cmos_set_s3_resume(void) {}
+#endif

 /* pc.c */
 extern int fd_bootchk; 


-- 
yamahata

[Qemu-devel] Re: [PATCH 09/17] pc.c: remove a global variable, RTCState *rtc_state.

[Paolo Bonzini]

> The case you pointed out is handled in pc.h.
> Or are you suggesting that they should be defined in pc.c even when
> TARGET_I386 isn't defined?

Yes, sorry for not being precise.  I also think that
cmos_set_s3_resume_init should work even if TARGET_I386 isn't defined.
 Only cmos_set_s3_resume should be a nop.

Thanks,

Paolo

[Qemu-devel] Re: [PATCH 09/17] pc.c: remove a global variable, RTCState *rtc_state.

[Isaku Yamahata]

On Wed, Jul 08, 2009 at 05:30:19PM +0200, Paolo Bonzini wrote:
> > The case you pointed out is handled in pc.h.
> > Or are you suggesting that they should be defined in pc.c even when
> > TARGET_I386 isn't defined?
> 
> Yes, sorry for not being precise.  I also think that
> cmos_set_s3_resume_init should work even if TARGET_I386 isn't defined.
>  Only cmos_set_s3_resume should be a nop.

So is what you want the patch + the following hunks?
If so, I'll squash them into the patch with the next spin.

diff --git a/hw/pc.c b/hw/pc.c
index 74ac4fa..4927079 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -1358,7 +1358,6 @@ void pc_pci_device_init(PCIBus *pci_bus)
     }
 }
 
-#if defined(TARGET_I386)
 /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
    BIOS will read it and start S3 resume at POST Entry */
 static RTCState *rtc_state;
@@ -1369,7 +1368,8 @@ void cmos_set_s3_resume_init(RTCState *s)
 
 void cmos_set_s3_resume(void)
 {
+#if defined(TARGET_I386)
     if (rtc_state)
         rtc_set_memory(rtc_state, 0xF, 0xFE);
-}
 #endif
+}
diff --git a/hw/pc.h b/hw/pc.h
index b1bb829..f52b977 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -95,13 +95,8 @@ RTCState *rtc_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq,
                       int base_year);
 void rtc_set_memory(RTCState *s, int addr, int val);
 void rtc_set_date(RTCState *s, const struct tm *tm);
-#if defined(TARGET_I386)
 void cmos_set_s3_resume_init(RTCState *s);
 void cmos_set_s3_resume(void);
-#else
-static inline void cmos_set_s3_resume_init(RTCState *s) {}
-static inline void cmos_set_s3_resume(void) {}
-#endif
 
 /* pc.c */
 extern int fd_bootchk;


-- 
yamahata

[Qemu-devel] Re: [PATCH 09/17] pc.c: remove a global variable, RTCState *rtc_state.

[Paolo Bonzini]

> So is what you want the patch + the following hunks?
> If so, I'll squash them into the patch with the next spin.

Exactly, thanks!

Paolo