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From: Richard Henderson <richard.henderson@linaro.org>
To: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
	qemu-devel@nongnu.org
Cc: anton.kochkov@proton.me
Subject: Re: [PATCH 04/10] target/tricore: Implement FTOU insn
Date: Sat, 26 Aug 2023 21:50:51 -0700	[thread overview]
Message-ID: <f8f824f3-add2-a6ea-1e78-48aa9d1b6e56@linaro.org> (raw)
In-Reply-To: <20230826160242.312052-5-kbastian@mail.uni-paderborn.de>

On 8/26/23 09:02, Bastian Koppelmann wrote:
> +uint32_t helper_ftou(CPUTriCoreState *env, uint32_t arg)
> +{
> +    float32 f_arg = make_float32(arg);
> +    uint32_t result;
> +    int32_t flags = 0;
> +
> +    if (float32_is_any_nan(f_arg)) {
> +        result = 0;
> +        flags |= float_flag_invalid;
> +    } else if (float32_lt_quiet(f_arg, 0, &env->fp_status)) {
> +        result = 0;
> +        flags = float_flag_invalid;
> +    } else {
> +        result = float32_to_uint32(f_arg, &env->fp_status);
> +        flags = f_get_excp_flags(env);
> +    }

You should allow softfloat to diagnose the special cases, and negative -> 0 is standard 
behaviour.  Therefore:

     result = float32_to_uint32(f_arg, status);
     flags = f_get_excp_flags();

     if (flags) {
         if ((flags & float_flag_invalid)
             && !(get_float_exception_flags() & float_flag_invalid_cvti)) {
             /* invalid without cvti is nan input */
             result = 0;
         }
         f_update_psw_flags(...);
     } else {
         fs = 0;
     }


r~


  reply	other threads:[~2023-08-27  4:52 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-26 16:02 [PATCH 00/10] TriCore 1.6.2 insn and bugfixes Bastian Koppelmann
2023-08-26 16:02 ` [PATCH 01/10] tests/tcg/tricore: Bump cpu to tc37x Bastian Koppelmann
2023-08-27  4:23   ` Richard Henderson
2023-08-26 16:02 ` [PATCH 02/10] target/tricore: Implement CRCN insn Bastian Koppelmann
2023-08-27  4:33   ` Richard Henderson
2023-08-26 16:02 ` [PATCH 03/10] target/tricore: Correctly handle FPU RM from PSW Bastian Koppelmann
2023-08-27  4:37   ` Richard Henderson
2023-08-26 16:02 ` [PATCH 04/10] target/tricore: Implement FTOU insn Bastian Koppelmann
2023-08-27  4:50   ` Richard Henderson [this message]
2023-08-27 11:07     ` Bastian Koppelmann
2023-08-27 14:49       ` Richard Henderson
2023-08-27 16:36         ` Bastian Koppelmann
2023-08-27 18:32           ` Richard Henderson
2023-08-27 18:59             ` Bastian Koppelmann
2023-08-26 16:02 ` [PATCH 05/10] target/tricore: Implement ftohp insn Bastian Koppelmann
2023-08-27  4:55   ` Richard Henderson
2023-08-27  7:09     ` Bastian Koppelmann
2023-08-27 14:51       ` Richard Henderson
2023-08-26 16:02 ` [PATCH 06/10] target/tricore: Implement hptof insn Bastian Koppelmann
2023-08-27  4:56   ` Richard Henderson
2023-08-26 16:02 ` [PATCH 07/10] target/tricore: Fix RCPW/RRPW_INSERT insns for width = 0 Bastian Koppelmann
2023-08-27  4:59   ` Richard Henderson
2023-08-26 16:02 ` [PATCH 08/10] target/tricore: Swap src and dst reg for RCRR_INSERT Bastian Koppelmann
2023-08-27  5:06   ` Richard Henderson
2023-08-27  7:18     ` Bastian Koppelmann
2023-08-26 16:02 ` [PATCH 09/10] target/tricore: Replace cpu_*_code with translator_* Bastian Koppelmann
2023-08-27  5:06   ` Richard Henderson
2023-08-26 16:02 ` [PATCH 10/10] target/tricore: Fix FTOUZ being ISA v1.3.1 up Bastian Koppelmann
2023-08-27  5:06   ` Richard Henderson

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