From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: Anton Johansson <anjo@rev.ng>,
Pierrick Bouvier <pierrick.bouvier@linaro.org>,
Stafford Horne <shorne@gmail.com>
Subject: Re: [PATCH v2 03/10] target/openrisc: Replace MO_TE -> MO_BE
Date: Thu, 9 Oct 2025 11:19:25 +0200 [thread overview]
Message-ID: <f9e70ff3-f782-44f9-8df0-7a5bd117d1a1@linaro.org> (raw)
In-Reply-To: <20251009081903.13426-4-philmd@linaro.org>
On 9/10/25 10:18, Philippe Mathieu-Daudé wrote:
> We only build the OpenRISC targets using big endianness order:
>
> $ git grep TARGET_BIG_ENDIAN configs/targets/or1k-*
> configs/targets/or1k-linux-user.mak:2:TARGET_BIG_ENDIAN=y
> configs/targets/or1k-softmmu.mak:2:TARGET_BIG_ENDIAN=y
>
> Therefore the MO_TE definition always expands to MO_BE. Use the
> latter to simplify.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> target/openrisc/translate.c | 16 ++++++++--------
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c
> index df0ebcd3138..4ece2547614 100644
> --- a/target/openrisc/translate.c
> +++ b/target/openrisc/translate.c
> @@ -647,7 +647,7 @@ static bool trans_l_lwa(DisasContext *dc, arg_load *a)
> check_r0_write(dc, a->d);
> ea = tcg_temp_new();
> tcg_gen_addi_tl(ea, cpu_R(dc, a->a), a->i);
> - tcg_gen_qemu_ld_tl(cpu_R(dc, a->d), ea, dc->mem_idx, MO_TE | MO_UL);
> + tcg_gen_qemu_ld_tl(cpu_R(dc, a->d), ea, dc->mem_idx, MO_BE | MO_UL);
> tcg_gen_mov_tl(cpu_lock_addr, ea);
> tcg_gen_mov_tl(cpu_lock_value, cpu_R(dc, a->d));
> return true;
> @@ -665,13 +665,13 @@ static void do_load(DisasContext *dc, arg_load *a, MemOp mop)
>
> static bool trans_l_lwz(DisasContext *dc, arg_load *a)
> {
> - do_load(dc, a, MO_TE | MO_UL);
> + do_load(dc, a, MO_BE | MO_UL);
> return true;
> }
>
> static bool trans_l_lws(DisasContext *dc, arg_load *a)
> {
> - do_load(dc, a, MO_TE | MO_SL);
> + do_load(dc, a, MO_BE | MO_SL);
> return true;
> }
Hmm should we move MO_BE within do_load()?
next prev parent reply other threads:[~2025-10-09 9:20 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-09 8:18 [PATCH v2 00/10] target/openrisc: Remove all uses of target_[u]long types Philippe Mathieu-Daudé
2025-10-09 8:18 ` [PATCH v2 01/10] target/openrisc: Replace VMSTATE_UINTTL() -> VMSTATE_UINT32() Philippe Mathieu-Daudé
2025-10-09 16:41 ` Richard Henderson
2025-10-09 8:18 ` [PATCH v2 02/10] target/openrisc: Explode MO_TExx -> MO_TE | MO_xx Philippe Mathieu-Daudé
2025-10-09 16:43 ` Richard Henderson
2025-10-10 6:56 ` Philippe Mathieu-Daudé
2025-10-09 8:18 ` [PATCH v2 03/10] target/openrisc: Replace MO_TE -> MO_BE Philippe Mathieu-Daudé
2025-10-09 9:19 ` Philippe Mathieu-Daudé [this message]
2025-10-09 8:18 ` [PATCH v2 04/10] target/openrisc: Do not use target_ulong for @mr in MTSPR helper Philippe Mathieu-Daudé
2025-10-09 16:45 ` Richard Henderson
2025-10-09 8:18 ` [PATCH v2 05/10] target/openrisc: Remove unused cpu_openrisc_map_address_*() handlers Philippe Mathieu-Daudé
2025-10-09 16:47 ` Richard Henderson
2025-10-09 8:18 ` [PATCH v2 06/10] target/openrisc: Remove target_ulong use in raise_mmu_exception() Philippe Mathieu-Daudé
2025-10-09 16:48 ` Richard Henderson
2025-10-09 8:18 ` [PATCH v2 07/10] target/openrisc: Use vaddr type for $pc jumps Philippe Mathieu-Daudé
2025-10-09 16:49 ` Richard Henderson
2025-10-09 8:19 ` [PATCH v2 08/10] target/openrisc: Remove 'TARGET_LONG_BITS != 32' dead code Philippe Mathieu-Daudé
2025-10-09 16:50 ` Richard Henderson
2025-10-09 8:19 ` [PATCH v2 09/10] target/openrisc: Inline tcg_gen_trunc_i64_tl() Philippe Mathieu-Daudé
2025-10-09 16:50 ` Richard Henderson
2025-10-09 8:19 ` [PATCH v2 10/10] target/openrisc: Replace target_ulong -> uint32_t Philippe Mathieu-Daudé
2025-10-09 16:52 ` Richard Henderson
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