From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([209.51.188.92]:45183) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hDg6T-0002i4-I4 for qemu-devel@nongnu.org; Mon, 08 Apr 2019 22:03:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hDg6S-0006IX-EH for qemu-devel@nongnu.org; Mon, 08 Apr 2019 22:03:13 -0400 Received: from mail-io1-xd29.google.com ([2607:f8b0:4864:20::d29]:40346) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hDg6S-0006HC-2P for qemu-devel@nongnu.org; Mon, 08 Apr 2019 22:03:12 -0400 Received: by mail-io1-xd29.google.com with SMTP id d201so12864414iof.7 for ; Mon, 08 Apr 2019 19:03:11 -0700 (PDT) From: Stephen Checkoway Date: Mon, 8 Apr 2019 22:01:27 -0400 Message-Id: In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PATCH v2 03/10] block/pflash_cfi02: Fix command address comparison List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Kevin Wolf , Max Reitz , qemu-block@nongnu.org, Stephen Checkoway , Thomas Huth , Laurent Vivier , Paolo Bonzini Most AMD commands only examine 11 bits of the address. This masks the addresses used in the comparison to 11 bits. The exceptions are word or sector addresses which use offset directly rather than the shifted offset, boff. Signed-off-by: Stephen Checkoway --- hw/block/pflash_cfi02.c | 8 +++++++- tests/pflash-cfi02-test.c | 12 ++++++++++-- 2 files changed, 17 insertions(+), 3 deletions(-) diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index 4b7af71806..e4bff0c8f8 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -296,11 +296,13 @@ static void pflash_write(void *opaque, hwaddr offset, uint64_t value, DPRINTF("%s: offset " TARGET_FMT_plx " %08" PRIx64 " %d\n", __func__, offset, value, width); - boff = offset & (pfl->sector_len - 1); + boff = offset; if (pfl->width == 2) boff = boff >> 1; else if (pfl->width == 4) boff = boff >> 2; + /* Only the least-significant 11 bits are used in most cases. */ + boff &= 0x7FF; switch (pfl->wcycle) { case 0: /* Set the device in I/O access mode if required */ @@ -519,6 +521,10 @@ static void pflash_cfi02_realize(DeviceState *dev, Error **errp) return; } + /* Only 11 bits are used in the comparison. */ + pfl->unlock_addr0 &= 0x7FF; + pfl->unlock_addr1 &= 0x7FF; + chip_len = pfl->sector_len * pfl->nb_blocs; memory_region_init_rom_device(&pfl->orig_mem, OBJECT(pfl), diff --git a/tests/pflash-cfi02-test.c b/tests/pflash-cfi02-test.c index b113fca5af..b91bb66a79 100644 --- a/tests/pflash-cfi02-test.c +++ b/tests/pflash-cfi02-test.c @@ -23,8 +23,8 @@ #define FLASH_WIDTH 2 #define CFI_ADDR (FLASH_WIDTH * 0x55) -#define UNLOCK0_ADDR (FLASH_WIDTH * 0x5555) -#define UNLOCK1_ADDR (FLASH_WIDTH * 0x2AAA) +#define UNLOCK0_ADDR (FLASH_WIDTH * 0x555) +#define UNLOCK1_ADDR (FLASH_WIDTH * 0x2AA) #define CFI_CMD 0x98 #define UNLOCK0_CMD 0xAA @@ -192,6 +192,14 @@ static void test_flash(void) g_assert_cmpint(flash_read(6), ==, 0xCDEF); g_assert_cmpint(flash_read(8), ==, 0xFFFF); + /* Test ignored high order bits of address. */ + flash_write(FLASH_WIDTH * 0x5555, UNLOCK0_CMD); + flash_write(FLASH_WIDTH * 0x2AAA, UNLOCK1_CMD); + flash_write(FLASH_WIDTH * 0x5555, AUTOSELECT_CMD); + g_assert_cmpint(flash_read(FLASH_WIDTH * 0x0000), ==, 0x00BF); + g_assert_cmpint(flash_read(FLASH_WIDTH * 0x0001), ==, 0x236D); + reset(); + qtest_quit(global_qtest); } -- 2.20.1 (Apple Git-117) From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.7 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4E137C10F13 for ; Tue, 9 Apr 2019 02:05:03 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 11DF0213F2 for ; Tue, 9 Apr 2019 02:05:03 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=oberlin-edu.20150623.gappssmtp.com header.i=@oberlin-edu.20150623.gappssmtp.com header.b="SLbi2aJs" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 11DF0213F2 Authentication-Results: mail.kernel.org; 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[208.66.210.181]) by smtp.gmail.com with ESMTPSA id y203sm5969838itb.22.2019.04.08.19.03.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 08 Apr 2019 19:03:10 -0700 (PDT) From: Stephen Checkoway To: qemu-devel@nongnu.org Date: Mon, 8 Apr 2019 22:01:27 -0400 Message-Id: X-Mailer: git-send-email 2.20.1 (Apple Git-117) In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::d29 Subject: [Qemu-devel] [PATCH v2 03/10] block/pflash_cfi02: Fix command address comparison X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , Laurent Vivier , Thomas Huth , Stephen Checkoway , qemu-block@nongnu.org, Max Reitz , Paolo Bonzini Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="UTF-8" Message-ID: <20190409020127.4x-EcDhkX4YjSErmCYJz_VwLOPEdStlhoBbiz8--hNU@z> Most AMD commands only examine 11 bits of the address. This masks the addresses used in the comparison to 11 bits. The exceptions are word or sector addresses which use offset directly rather than the shifted offset, boff. Signed-off-by: Stephen Checkoway --- hw/block/pflash_cfi02.c | 8 +++++++- tests/pflash-cfi02-test.c | 12 ++++++++++-- 2 files changed, 17 insertions(+), 3 deletions(-) diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index 4b7af71806..e4bff0c8f8 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -296,11 +296,13 @@ static void pflash_write(void *opaque, hwaddr offset, uint64_t value, DPRINTF("%s: offset " TARGET_FMT_plx " %08" PRIx64 " %d\n", __func__, offset, value, width); - boff = offset & (pfl->sector_len - 1); + boff = offset; if (pfl->width == 2) boff = boff >> 1; else if (pfl->width == 4) boff = boff >> 2; + /* Only the least-significant 11 bits are used in most cases. */ + boff &= 0x7FF; switch (pfl->wcycle) { case 0: /* Set the device in I/O access mode if required */ @@ -519,6 +521,10 @@ static void pflash_cfi02_realize(DeviceState *dev, Error **errp) return; } + /* Only 11 bits are used in the comparison. */ + pfl->unlock_addr0 &= 0x7FF; + pfl->unlock_addr1 &= 0x7FF; + chip_len = pfl->sector_len * pfl->nb_blocs; memory_region_init_rom_device(&pfl->orig_mem, OBJECT(pfl), diff --git a/tests/pflash-cfi02-test.c b/tests/pflash-cfi02-test.c index b113fca5af..b91bb66a79 100644 --- a/tests/pflash-cfi02-test.c +++ b/tests/pflash-cfi02-test.c @@ -23,8 +23,8 @@ #define FLASH_WIDTH 2 #define CFI_ADDR (FLASH_WIDTH * 0x55) -#define UNLOCK0_ADDR (FLASH_WIDTH * 0x5555) -#define UNLOCK1_ADDR (FLASH_WIDTH * 0x2AAA) +#define UNLOCK0_ADDR (FLASH_WIDTH * 0x555) +#define UNLOCK1_ADDR (FLASH_WIDTH * 0x2AA) #define CFI_CMD 0x98 #define UNLOCK0_CMD 0xAA @@ -192,6 +192,14 @@ static void test_flash(void) g_assert_cmpint(flash_read(6), ==, 0xCDEF); g_assert_cmpint(flash_read(8), ==, 0xFFFF); + /* Test ignored high order bits of address. */ + flash_write(FLASH_WIDTH * 0x5555, UNLOCK0_CMD); + flash_write(FLASH_WIDTH * 0x2AAA, UNLOCK1_CMD); + flash_write(FLASH_WIDTH * 0x5555, AUTOSELECT_CMD); + g_assert_cmpint(flash_read(FLASH_WIDTH * 0x0000), ==, 0x00BF); + g_assert_cmpint(flash_read(FLASH_WIDTH * 0x0001), ==, 0x236D); + reset(); + qtest_quit(global_qtest); } -- 2.20.1 (Apple Git-117)