From: Richard Henderson <richard.henderson@linaro.org>
To: Song Gao <gaosong@loongson.cn>, qemu-devel@nongnu.org
Cc: yangxiaojuan@loongson.cn, huqi@loongson.cn,
peter.maydell@linaro.org, alex.bennee@linaro.org,
maobibo@loongson.cn
Subject: Re: [PATCH v2 2/4] target/loongarch: bstrins.w need set dest register EXT_SIGN
Date: Wed, 28 Sep 2022 08:13:49 -0700 [thread overview]
Message-ID: <fa9bc59a-a617-a243-7bf4-bc1f07db1a46@linaro.org> (raw)
In-Reply-To: <20220927064838.3570928-3-gaosong@loongson.cn>
On 9/26/22 23:48, Song Gao wrote:
> Signed-off-by: Song Gao <gaosong@loongson.cn>
> ---
> target/loongarch/insn_trans/trans_bit.c.inc | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/target/loongarch/insn_trans/trans_bit.c.inc b/target/loongarch/insn_trans/trans_bit.c.inc
> index 9337714ec4..33e94878fd 100644
> --- a/target/loongarch/insn_trans/trans_bit.c.inc
> +++ b/target/loongarch/insn_trans/trans_bit.c.inc
> @@ -37,7 +37,7 @@ static bool gen_rr_ms_ls(DisasContext *ctx, arg_rr_ms_ls *a,
> DisasExtend src_ext, DisasExtend dst_ext,
> void (*func)(TCGv, TCGv, unsigned int, unsigned int))
> {
> - TCGv dest = gpr_dst(ctx, a->rd, dst_ext);
> + TCGv dest = gpr_dst(ctx, a->rd, EXT_NONE);
> TCGv src1 = gpr_src(ctx, a->rj, src_ext);
>
> if (a->ls > a->ms) {
> @@ -206,7 +206,7 @@ TRANS(maskeqz, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_maskeqz)
> TRANS(masknez, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_masknez)
> TRANS(bytepick_w, gen_rrr_sa, EXT_NONE, EXT_NONE, gen_bytepick_w)
> TRANS(bytepick_d, gen_rrr_sa, EXT_NONE, EXT_NONE, gen_bytepick_d)
> -TRANS(bstrins_w, gen_rr_ms_ls, EXT_NONE, EXT_NONE, gen_bstrins)
> +TRANS(bstrins_w, gen_rr_ms_ls, EXT_NONE, EXT_SIGN, gen_bstrins)
These two hunks do opposite things: change dst_ext from NONE to SIGN, and then ignore the
change.
I assume the first hunk is in fact in error.
r~
> TRANS(bstrins_d, gen_rr_ms_ls, EXT_NONE, EXT_NONE, gen_bstrins)
> TRANS(bstrpick_w, gen_rr_ms_ls, EXT_NONE, EXT_SIGN, tcg_gen_extract_tl)
> TRANS(bstrpick_d, gen_rr_ms_ls, EXT_NONE, EXT_NONE, tcg_gen_extract_tl)
next prev parent reply other threads:[~2022-09-28 15:51 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-27 6:48 [PATCH v2 0/4] Fix some loongarch tcg bugs Song Gao
2022-09-27 6:48 ` [PATCH v2 1/4] target/loongarch: ftint_xxx insns set the result high 32bit 0xffffffff Song Gao
2022-09-28 15:14 ` Richard Henderson
2022-09-29 3:24 ` gaosong
2022-09-27 6:48 ` [PATCH v2 2/4] target/loongarch: bstrins.w need set dest register EXT_SIGN Song Gao
2022-09-28 15:13 ` Richard Henderson [this message]
2022-09-29 7:27 ` gaosong
2022-09-29 15:14 ` Richard Henderson
2022-09-27 6:48 ` [PATCH v2 3/4] target/loongarch: Fix fnm{sub/add}_{s/d} set wrong flags Song Gao
2022-09-28 15:16 ` Richard Henderson
2022-09-27 6:48 ` [PATCH v2 4/4] target/loongarch: flogb_{s/d} add set float_flag_divbyzero Song Gao
2022-09-28 15:24 ` Richard Henderson
2022-09-29 7:27 ` gaosong
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