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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-46e2ab31f62sm221035915e9.15.2025.09.29.03.37.12 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 29 Sep 2025 03:37:13 -0700 (PDT) Message-ID: Date: Mon, 29 Sep 2025 12:37:12 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 40/47] hw/arm/xlnx-versal: add versal2 SoC Content-Language: en-US To: Luc Michel , qemu-devel@nongnu.org, qemu-arm@nongnu.org Cc: Peter Maydell , Francisco Iglesias , "Edgar E . Iglesias" , Alistair Francis , Frederic Konrad , Sai Pavan Boddu References: <20250926070806.292065-1-luc.michel@amd.com> <20250926070806.292065-41-luc.michel@amd.com> From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: <20250926070806.292065-41-luc.michel@amd.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=philmd@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 26/9/25 09:07, Luc Michel wrote: > Add the Versal Gen 2 (versal2) version of the Versal SoC family. > This version embeds up to 8 Cortex-A78AE cores (split into 4 clusters) > and 10 Cortex-R52 cores (split into 5 clusters). The similarities > between versal and versal2 in term of architecture allow to reuse the > VersalMap structure to almost fully describe the implemented parts of > versal2. > > The versal2 eFuse device differs quite a lot from the versal one and is > left as future work. > > Signed-off-by: Luc Michel > Reviewed-by: Francisco Iglesias > Reviewed-by: Philippe Mathieu-Daudé > Reviewed-by: Edgar E. Iglesias > --- > include/hw/arm/xlnx-versal.h | 17 ++- > hw/arm/xlnx-versal.c | 207 ++++++++++++++++++++++++++++++++--- > 2 files changed, 209 insertions(+), 15 deletions(-) > > diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h > index b6cc71f7209..e1fb1f4cf5b 100644 > --- a/include/hw/arm/xlnx-versal.h > +++ b/include/hw/arm/xlnx-versal.h > @@ -1,7 +1,7 @@ > /* > - * Model of the Xilinx Versal > + * AMD/Xilinx Versal family SoC model. > * > * Copyright (c) 2018 Xilinx Inc. > * Copyright (c) 2025 Advanced Micro Devices, Inc. > * Written by Edgar E. Iglesias > * > @@ -20,10 +20,11 @@ > > #define TYPE_XLNX_VERSAL_BASE "xlnx-versal-base" > OBJECT_DECLARE_TYPE(Versal, VersalClass, XLNX_VERSAL_BASE) > > #define TYPE_XLNX_VERSAL "xlnx-versal" > +#define TYPE_XLNX_VERSAL2 "xlnx-versal2" > > struct Versal { > /*< private >*/ > SysBusDevice parent_obj; > > @@ -70,6 +71,20 @@ hwaddr versal_get_reserved_mmio_addr(Versal *s); > > int versal_get_num_cpu(VersalVersion version); > int versal_get_num_can(VersalVersion version); > int versal_get_num_sdhci(VersalVersion version); > > +static inline const char *versal_get_class(VersalVersion version) > +{ Not a blocker, but inlining isn't really justified here. > + switch (version) { > + case VERSAL_VER_VERSAL: > + return TYPE_XLNX_VERSAL; > + > + case VERSAL_VER_VERSAL2: > + return TYPE_XLNX_VERSAL2; > + > + default: > + g_assert_not_reached(); > + } > +}