Re: [PATCH v2 2/9] target/riscv: Add cpu_set_exception_base

["Philippe Mathieu-Daudé" <philmd@linaro.org>]

On 2/6/25 15:12, Djordje Todorovic wrote:
> Add a new function, so we can change reset vector from platforms.
> 
> Signed-off-by: Chao-ying Fu <cfu@mips.com>
> Signed-off-by: Djordje Todorovic <djordje.todorovic@htecgroup.com>
> ---
>   target/riscv/cpu.h       | 2 ++
>   target/riscv/translate.c | 8 ++++++++
>   2 files changed, 10 insertions(+)
> 
> diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
> index 229ade9ed9..c0e048a66d 100644
> --- a/target/riscv/cpu.h
> +++ b/target/riscv/cpu.h
> @@ -656,6 +656,8 @@ G_NORETURN void riscv_raise_exception(CPURISCVState *env,
>   target_ulong riscv_cpu_get_fflags(CPURISCVState *env);
>   void riscv_cpu_set_fflags(CPURISCVState *env, target_ulong);
>   
 > +void cpu_set_exception_base(int vp_index, target_ulong address);

If we need that, that'd be declared as:

#ifndef CONFIG_USER_ONLY
void riscv_cpu_set_exception_base(int vp_index, target_ulong address);
#endif