From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Hqxq1-0002AD-1v for qemu-devel@nongnu.org; Wed, 23 May 2007 16:53:41 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Hqxpz-00029h-Mm for qemu-devel@nongnu.org; Wed, 23 May 2007 16:53:40 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Hqxpz-00029e-G5 for qemu-devel@nongnu.org; Wed, 23 May 2007 16:53:39 -0400 Received: from ug-out-1314.google.com ([66.249.92.172]) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1Hqxpy-0001XT-I2 for qemu-devel@nongnu.org; Wed, 23 May 2007 16:53:39 -0400 Received: by ug-out-1314.google.com with SMTP id a2so554690ugf for ; Wed, 23 May 2007 13:53:34 -0700 (PDT) Message-ID: Date: Wed, 23 May 2007 22:53:34 +0200 From: "andrzej zaborowski" Subject: Re: [Qemu-devel] Timers In-Reply-To: <200705232048.16793.paul@codesourcery.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <200705230107.00962.paul@codesourcery.com> <200705231818.59906.paul@codesourcery.com> <200705232048.16793.paul@codesourcery.com> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Blue Swirl On 23/05/07, Paul Brook wrote: > On Wednesday 23 May 2007, Blue Swirl wrote: > > On 5/23/07, Paul Brook wrote: > > > On Wednesday 23 May 2007, Blue Swirl wrote: > > > > On 5/23/07, Paul Brook wrote: > > > > > I get fed up of having to re-implement a simple countdown timer for > > > > > every new board, so I've added a simple periodic timer implementation > > > > > to cvs (ptimer.c). Currently only the Arm PrimeCell based boards use > > > > > this, but I've a few other uses in the pipeline. > > > > > > > > Nice idea! On Sparc the timer can be configured to work in 64-bit > > > > mode, so could the ptimer_get/set_count be changed to use 64-bit > > > > values? > > I made the API change and converted Sparc timers. Looks like it works > > (guest clock runs normally), though there are the following messages > > on startup: > > FIXME: ptimer_set_limit with running timer > > > > Comments? Did I break something? > > Code looks reasonable to me. The FIXME means you're changing the timer > parameters after starting the timer. I didn't check whether this does > anything sensible (this may depend on the device), hence the message. > It probably needs some attention when reload == 1 && s->enabled. > > Note that save/restore is not implemented. You may wish to implement this I was thinking that it should be possible to save/restore all vm_clock based timers in qemu at QEMUTimer level so that hardware emulation doesn't have to bother restoring this. (the "ptimer" would still need to save its internal fields). Regards, Andrzej