From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Jimlx-0005vi-J2 for qemu-devel@nongnu.org; Mon, 07 Apr 2008 04:32:13 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Jimlw-0005v7-7n for qemu-devel@nongnu.org; Mon, 07 Apr 2008 04:32:13 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Jimlv-0005uz-NF for qemu-devel@nongnu.org; Mon, 07 Apr 2008 04:32:11 -0400 Received: from ug-out-1314.google.com ([66.249.92.171]) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1Jimlv-000728-Ao for qemu-devel@nongnu.org; Mon, 07 Apr 2008 04:32:11 -0400 Received: by ug-out-1314.google.com with SMTP id m2so372552uge.4 for ; Mon, 07 Apr 2008 01:32:10 -0700 (PDT) Message-ID: Date: Mon, 7 Apr 2008 10:32:10 +0200 From: "andrzej zaborowski" Subject: Re: [kvm-devel] [Qemu-devel] [PATCH 2/6] PCI DMA API (v2) In-Reply-To: <200804061940.37403.paul@codesourcery.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <1207368175-19476-1-git-send-email-aliguori@us.ibm.com> <47F8EAAB.2080806@codemonkey.ws> <200804061940.37403.paul@codesourcery.com> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paul Brook Cc: Blue Swirl , kvm-devel@lists.sourceforge.net, qemu-devel@nongnu.org On 07/04/2008, Paul Brook wrote: > > As a note, the DMA controllers in the ARM system-on-chip's can > > byte-swap, do 90deg rotation of 2D arrays, transparency (probably > > intened for image blitting, but still available on any kind of > > transfers), etc., and most importantly issue interrupts on reaching > > different points of a transfer. It is not worth worrying about them > > in this API. I have been for some time wanting to make a separate api > > called soc_dma whose task would be using simply memcpy (or zero-copy) > > in the most basic case (interrupts off, no transparency, > > same-endianness endpoints), as these properties are common for DMA on > > the TI OMAPs, the Intel PXAs and the Samsung S3Cs (which otherwise > > have little in common). > > Are you sure you aren't confusing the DMA engine itelf (which is just annother > peripheral) with a mechanism for allowing dma engines access to the system. I'm talking about the engine. I want to add a generic one that will detect the no-transformation, no-interrupts case and then possibly use something like IOVector for a whole transfer.