From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1JlUYE-0006Bw-A1 for qemu-devel@nongnu.org; Mon, 14 Apr 2008 15:41:14 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1JlUYC-00068a-JL for qemu-devel@nongnu.org; Mon, 14 Apr 2008 15:41:13 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1JlUYC-00068J-89 for qemu-devel@nongnu.org; Mon, 14 Apr 2008 15:41:12 -0400 Received: from ug-out-1314.google.com ([66.249.92.173]) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1JlUYB-0007Wp-Hp for qemu-devel@nongnu.org; Mon, 14 Apr 2008 15:41:11 -0400 Received: by ug-out-1314.google.com with SMTP id m2so548174uge.4 for ; Mon, 14 Apr 2008 12:41:07 -0700 (PDT) Message-ID: Date: Mon, 14 Apr 2008 21:41:06 +0200 From: "andrzej zaborowski" Subject: Re: [Qemu-devel] Re: [PATCH 2/2] 8250: Customized base baudrate In-Reply-To: <4803AED9.7010001@web.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <4801C476.3040509@web.de> <4803AED9.7010001@web.de> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org On 14/04/2008, Jan Kiszka wrote: > andrzej zaborowski wrote: > > On 13/04/2008, Jan Kiszka wrote: > > >> --- a/hw/omap1.c > >> +++ b/hw/omap1.c > >> @@ -1734,7 +1734,8 @@ struct omap_uart_s *omap_uart_init(targe > >> struct omap_uart_s *s = (struct omap_uart_s *) > >> qemu_mallocz(sizeof(struct omap_uart_s)); > >> if (chr) > >> - s->serial = serial_mm_init(base, 2, irq, chr, 1); > >> + s->serial = > >> + serial_mm_init(base, 2, irq, omap_clk_getrate(clk)/16, chr, 1); > > > > Yes, this should be correct. > > While typing those line I wondered if it is possible and reasonable that > a guest changes this clock rate during runtime? In that case, the > perfect, but probably much more complex solution would be to track those > changes also with the serial emulation... Yes, UART1 and UART3 (I think) can switch between 48MHz (dpll) and 16MHz clock domains on OMAP1 and the guest has control over this (and the characters flow indeed slows down three times when you switch to 16MHz on the real hw). omap_clk.c allows a peripheral to register for notifications of rate change for a particular clock. I don't think it's worth bothering too much because anything that depends on the timing of QEMU will likely have problems anyway. Regards -- Please do not print this email unless absolutely necessary. Spread environmental awareness.