From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KMISj-0001Gs-7Q for qemu-devel@nongnu.org; Fri, 25 Jul 2008 04:15:41 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KMISg-0001GI-Ga for qemu-devel@nongnu.org; Fri, 25 Jul 2008 04:15:40 -0400 Received: from [199.232.76.173] (port=43951 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KMISg-0001G7-6c for qemu-devel@nongnu.org; Fri, 25 Jul 2008 04:15:38 -0400 Received: from an-out-0708.google.com ([209.85.132.245]:7607) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1KMISd-0003Oe-9N for qemu-devel@nongnu.org; Fri, 25 Jul 2008 04:15:36 -0400 Received: by an-out-0708.google.com with SMTP id d18so1269020and.130 for ; Fri, 25 Jul 2008 01:15:34 -0700 (PDT) Message-ID: Date: Fri, 25 Jul 2008 10:15:34 +0200 From: "andrzej zaborowski" Subject: Re: [Qemu-devel] [PATCH] Add Apollon (OMAP24xx) board support In-Reply-To: <9c9fda240807250054o7db36912u3f3d11d0a580a91c@mail.gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <20080724230053.GA20704@july> <9c9fda240807250054o7db36912u3f3d11d0a580a91c@mail.gmail.com> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org 2008/7/25 Kyungmin Park : >>> @@ -3875,7 +3926,11 @@ static uint32_t omap_sdrc_read(void *opaque, target_phys_addr_t addr) >>> case 0x68: /* SDRC_DLLB_CTRL */ >>> case 0x6c: /* SDRC_DLLB_STATUS */ >>> case 0x70: /* SDRC_POWER */ >>> + return 0x00; >>> + >>> case 0x80: /* SDRC_MCFG_0 */ >>> + return 0x4000; >>> + >> >> This should be made writable (default value is 0) and the bootloader >> or the board file (hw/nseries.c) needs to write the correct value >> there. > > Agreed, apollon and omap2420h4 read this value at bootloader, Yes it's > meanless in qemu. > it's seted at initial bootloader, but it's not in qemu. If sdrc has > array value, we can read it I mean something like uint32_t mcfg0 = (boot_info.ram_size / 0x200000) << 8; /* RAMSIZE */ cpu_physical_memory_write(0x68009080, /* SDRC_MCFG_0 */ (void *) &mcfg0, sizeof(mcfg0)); > >> >> Would there be much redundancy if apollon setup was in a separate file? > > Yes, as you see almost same as n800. It seems apollon only uses n8x0_init, n8x0_nand_setup and n8x0_usb_setup, everything else is nseries-specific. (plus maybe the menelaus chip on i2c) > >> >> The latter two don't seem to be supported in this patch. OMAP2 on-chip >> lcdc will require a bit of work to be usable. > > It's initial support we need to work more to support full peripherals. >> >>> +@item >>> +Secure Digital card connected to OMAP MMC/SD host >>> +@item >>> +One OMAP on-chip UARTs >>> +@item >>> +External USB transceiver chip connected to USB controller embedded in a TI >> >> (TUSB6010 chip?) > > actually ISP1105W. > >> >>> +@item >>> +Three GPIO switches and GPIO indicate LEDs >> >> This isn't in the patch either. >> >> I'll commit the omap GPMC improvements for the moment. >> > > same as above. > > If you don't mind I want to add mentioned devices later You don't have to add them, but they shouldn't be listed in qemu-doc.texi before they are supported. Cheers, Andrzej