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Date: Fri, 25 Jul 2008 11:13:13 +0200
From: "andrzej zaborowski" <balrogg@gmail.com>
Subject: Re: [Qemu-devel] [PATCH] Add Apollon (OMAP24xx) board support
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To: qemu-devel@nongnu.org

2008/7/25 andrzej zaborowski <balrogg@gmail.com>:
> 2008/7/25 Kyungmin Park <kmpark@infradead.org>:
>>>> @@ -3875,7 +3926,11 @@ static uint32_t omap_sdrc_read(void *opaque, target_phys_addr_t addr)
>>>>     case 0x68: /* SDRC_DLLB_CTRL */
>>>>     case 0x6c: /* SDRC_DLLB_STATUS */
>>>>     case 0x70: /* SDRC_POWER */
>>>> +         return 0x00;
>>>> +
>>>>     case 0x80: /* SDRC_MCFG_0 */
>>>> +         return 0x4000;
>>>> +
>>>
>>> This should be made writable (default value is 0) and the bootloader
>>> or the board file (hw/nseries.c) needs to write the correct value
>>> there.
>>
>> Agreed, apollon and omap2420h4 read this value at bootloader, Yes it's
>> meanless in qemu.
>> it's seted at initial bootloader, but it's not in qemu. If sdrc has
>> array value, we can read it
>
> I mean something like
>
>    uint32_t mcfg0 = (boot_info.ram_size / 0x200000) << 8;        /* RAMSIZE */
>
>    cpu_physical_memory_write(0x68009080,     /* SDRC_MCFG_0 */
>                    (void *) &mcfg0, sizeof(mcfg0));

Actually it's set to half the ram size in SDRC_MCFG_0 and other half
in SDRC_MCFG_1 because there are two chips. Nokia bootloader writes
the following values:

0x01702019 in 0x68009080 and
0x01702019 in 0x680090b0

Cheers