From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KpORm-0000hW-RB for qemu-devel@nongnu.org; Mon, 13 Oct 2008 10:30:58 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KpORk-0000gm-GF for qemu-devel@nongnu.org; Mon, 13 Oct 2008 10:30:58 -0400 Received: from [199.232.76.173] (port=39762 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KpORk-0000gj-CL for qemu-devel@nongnu.org; Mon, 13 Oct 2008 10:30:56 -0400 Received: from rv-out-0708.google.com ([209.85.198.244]:15549) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1KpORj-0000p7-Er for qemu-devel@nongnu.org; Mon, 13 Oct 2008 10:30:55 -0400 Received: by rv-out-0708.google.com with SMTP id f25so1479036rvb.22 for ; Mon, 13 Oct 2008 07:30:53 -0700 (PDT) Message-ID: Date: Mon, 13 Oct 2008 16:30:53 +0200 From: "andrzej zaborowski" Subject: Re: [Qemu-devel] [PATCH] ARM CP14 trivial support In-Reply-To: <200810131420.43031.paul@codesourcery.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <1223894552.30000.30.camel@petitemort> <200810131420.43031.paul@codesourcery.com> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paul Brook Cc: qemu-devel@nongnu.org, dsilvers@simtec.co.uk 2008/10/13 Paul Brook : > On Monday 13 October 2008, andrzej zaborowski wrote: >> 2008/10/13 Daniel Silverstone : >> > Continuing the patch series aiming at supporting Simtec's development >> > boards and other Samsung SoC based systems, attached is a patch which >> > provides trivial coprocessor 14 support. >> >> + case 14: >> + return disas_cp14_insn (env, s, insn); >> >> This will break PXA emulation or anything that already emulates cp14. > > Anything that emulates cp14 should really be doing it here. > The pxa coprocessor bits are IMHO a hack. Coprocessor io has similar potential to mmio or x86 port io. You said it's device specific. If in a SoC a peripheral is attached through it, probably the whole peripheral shouldn't be in target-arm/ ? Regards