From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KpOrp-0006ik-Q7 for qemu-devel@nongnu.org; Mon, 13 Oct 2008 10:57:53 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KpOro-0006gy-BB for qemu-devel@nongnu.org; Mon, 13 Oct 2008 10:57:53 -0400 Received: from [199.232.76.173] (port=42649 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KpOro-0006gl-7o for qemu-devel@nongnu.org; Mon, 13 Oct 2008 10:57:52 -0400 Received: from rv-out-0708.google.com ([209.85.198.247]:26305) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1KpOrn-0006nu-GI for qemu-devel@nongnu.org; Mon, 13 Oct 2008 10:57:51 -0400 Received: by rv-out-0708.google.com with SMTP id f25so1488841rvb.22 for ; Mon, 13 Oct 2008 07:57:50 -0700 (PDT) Message-ID: Date: Mon, 13 Oct 2008 16:57:50 +0200 From: "andrzej zaborowski" Subject: Re: [Qemu-devel] [PATCH] ARM CP14 trivial support In-Reply-To: <200810131536.35768.paul@codesourcery.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <1223894552.30000.30.camel@petitemort> <200810131420.43031.paul@codesourcery.com> <200810131536.35768.paul@codesourcery.com> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paul Brook Cc: qemu-devel@nongnu.org, dsilvers@simtec.co.uk 2008/10/13 Paul Brook : >> Coprocessor io has similar potential to mmio or x86 port io. You said >> it's device specific. If in a SoC a peripheral is attached through >> it, probably the whole peripheral shouldn't be in target-arm/ ? > > I disbelieve that any chips use the came coprocessor ID for both core and SoC > functionality. I'm talking about coprocessor used for SoC only functionality. Regards