[Qemu-devel] [patch] esp.c fast SCSI-bus reset

[Qemu-devel] [patch] esp.c fast SCSI-bus reset

[Artyom Tarasenko]

It seems to make a little sense to raise an interrupt still having
"bus reset" status, since it makes the host think the bus is busy.
The proper way would be to tell all the scsi devices to reset before
the interrupt.
The patch makes scsi probe to come a little further when using OBP
under sparc32.

--- hw/esp.c.master     2009-07-24 00:28:30.146422134 +0200
+++ hw/esp.c    2009-07-24 12:08:48.585546871 +0200
@@ -505,7 +505,7 @@
             break;
         case CMD_BUSRESET:
             DPRINTF("Bus reset (%2.2x)\n", val);
-            s->rregs[ESP_RINTR] = INTR_RST;
+           s->rregs[ESP_RINTR] = 0;
             if (!(s->wregs[ESP_CFG1] & CFG1_RESREPT)) {
                 esp_raise_irq(s);
             }

Re: [Qemu-devel] [patch] esp.c fast SCSI-bus reset

[Blue Swirl]

On Fri, Jul 24, 2009 at 1:21 PM, Artyom
Tarasenko<atar4qemu@googlemail.com> wrote:
> It seems to make a little sense to raise an interrupt still having
> "bus reset" status, since it makes the host think the bus is busy.
> The proper way would be to tell all the scsi devices to reset before
> the interrupt.
> The patch makes scsi probe to come a little further when using OBP
> under sparc32.

Unfortunately it also makes BSDs think that the bus reset hasn't happened:
OpenBSD 4.3 (RAMDISK) #415: Tue Mar 11 18:31:57 MDT 2008
    deraadt@sparc.openbsd.org:/usr/src/sys/arch/sparc/compile/RAMDISK

[clip]

esp0 at dma0 offset 0x8800000 pri 4: ESP200, 40MHz, SCSI ID 7
scsibus0 at esp0: 8 targets
esp0: waiting for SCSI Bus Reset to happen
probe(esp0:0:0): esp0: timed out [ecb 0xf9c2d000 (flags 0x3, dleft 24,
stat 0)], <state 9, nexus 0x0, phase(l 0, c 0, p 101), resid 0, msg(q
0,o 0) >
probe(esp0:0:0): esp0: timed out [ecb 0xf9c2d000 (flags 0x43, dleft
24, stat 0)], <state 9, nexus 0x0, phase(l 0, c 0, p 101), resid 0,
msg(q 0,o 0) > AGAIN
esp0: waiting for SCSI Bus Reset to happen

NetBSD just hangs:
NetBSD 4.0 (INSTALL) #0: Sun Dec 16 02:32:37 PST 2007
        builds@wb29:/home/builds/ab/netbsd-4-0-RELEASE/sparc/200712160005Z-obj/home/builds/ab/netbsd-4-0-RELEASE/src/sys/arch/sparc/compile/INSTALL

[clip]
esp0 at dma0 slot 5 offset 0x8800000 level 4: ESP200, 40MHz, SCSI ID 7
scsibus0 at esp0: 8 targets, 8 luns per target
ledma0 at sbus0 slot 5 offset 0x8400010: DMA rev 2
le0 at ledma0 slot 5 offset 0x8c00000 level 6: address 52:54:00:12:34:56
le0: 8 receive buffers, 2 transmit buffers
SUNW,CS4231 at sbus0 slot 4 offset 0xc000000 level 5 (ipl 9) not configured
power-management at sbus0 slot 4 offset 0xa000000 not configured
esp0: waiting for SCSI Bus Reset to happen
timecounter: Timecounter "clockinterrupt" frequency 100 Hz quality 0
md0: internal 688 KB image area
scsibus0: waiting 2 seconds for devices to settle...

Linux is not affected.

Re: [Qemu-devel] [patch] esp.c fast SCSI-bus reset

[Artyom Tarasenko]

> Unfortunately it also makes BSDs think that the bus reset hasn't happened:


How about this one? Seems to be fine with NetBSD. Not "fast" though,
emulates more precisely what would happen on a real hw.

--- qemu-master/hw/esp.c.master 2009-07-28 19:42:24.161417594 +0200
+++ qemu-master/hw/esp.c        2009-07-28 20:08:15.683543101 +0200
@@ -448,6 +448,11 @@
        // Clear interrupt/error status bits
        s->rregs[ESP_RSTAT] &= ~(STAT_GE | STAT_PE);
        esp_lower_irq(s);
+        // Clear bus reset
+        if(INTR_RST==s->rregs[ESP_RINTR]) {

+            s->rregs[ESP_RINTR] = 0;

+             return INTR_RST;
+       }
        break;
    default:
        break;

Re: [Qemu-devel] [patch] esp.c fast SCSI-bus reset

[Blue Swirl]

[-- Attachment #1: Type: text/plain, Size: 763 bytes --]

On Tue, Jul 28, 2009 at 9:14 PM, Artyom
Tarasenko<atar4qemu@googlemail.com> wrote:
>> Unfortunately it also makes BSDs think that the bus reset hasn't happened:
>
>
> How about this one? Seems to be fine with NetBSD. Not "fast" though,
> emulates more precisely what would happen on a real hw.

Thanks, but I read the interrupt register part of the data sheet
again, and it looks like the current implementation was not correct at
all.

This patch clears interrupt, sequence and status registers like the
data sheet specifies and also passes my tests, does it help with
yours?

In the future, please add a Signed-off-by line. The coding style
(indentation, spaces between tokens) did not match rest of QEMU and
expression order should be like x == 1, not 1 == x.

[-- Attachment #2: 0001-esp-fix-interrupt-register-read.patch --]
[-- Type: application/x-patch, Size: 1452 bytes --]

Re: [Qemu-devel] [patch] esp.c fast SCSI-bus reset

[Artyom Tarasenko]

> This patch clears interrupt, sequence and status registers like the
> data sheet specifies and also passes my tests, does it help with
> yours?

Looks good, thanks.