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From: Artyom Tarasenko <atar4qemu@googlemail.com>
To: qemu-devel <qemu-devel@nongnu.org>
Subject: [Qemu-devel] sparc32 OBP tests
Date: Wed, 19 Aug 2009 12:36:23 +0200	[thread overview]
Message-ID: <fb8d4f70908190336i55482cfbl50f46839070333fd@mail.gmail.com> (raw)

Are there any interesting tests among these, which currently fail, but
shouldn't ?
Caches are probably not interesting,  esp fifo access neiter, but what
about the rest?

"intr  timer" and ebus/sbus "No trap detected" look surpising to me.
Or are these just unimplemented test registers?

1.1.1  mem    ram          walking ones             Pass
1.1.2  mem    ram          address                  Pass
1.1.3  mem    ram          post r/w region          Pass
1.1.4  mem    ram          obp r/w region           Pass
1.1.5  mem    ram          checkerboard             Pass
1.2.1  mem    control      parity                   Failed
Expected memory parity interrupt not detected
2.1.1  srmmu  regs         read/write               Failed
addr = 00000100, exp = 5A5A5A40, obs = 005A5A40
2.2.1  srmmu  ram          io-tlb                   Failed
addr = 00001080, exp = 800014F0, obs = 00000000
2.2.2  srmmu  ram          d-tlb                    Failed
addr = 00800000, exp = 00003523, obs = 00000000
2.2.3  srmmu  ram          pdt cache                Failed
addr = 00040000, exp = 00000100, obs = 00000000
3.1.1  iommu  reg          read/write               Pass
3.1.2  iommu  reg          flush individual         Failed
addr = 0000E080, exp = 8000E4E0, obs = 00000000
3.1.3  iommu  reg          flush all                Pass
3.2.1  iommu  timeout      ebus                     Failed
No trap detected
3.2.2  iommu  timeout      sbus                     Failed
No trap detected
4.1.1  fpu    reg          regfile                  Pass
4.1.2  fpu    reg          misalign                 Pass
4.1.3  fpu    reg          single precision         Pass
4.1.4  fpu    reg          double precision         Pass
4.2.1  fpu    exceptions   single precision         Failed
Exception Didn't Block Store : 0 : exp= 00000000, obs= FFFFFFFF
4.2.2  fpu    exceptions   double precision         Failed
Exception Didn't Block Store : 0 : exp= 00000000, obs= FFFFFFFF
5.1.1  cache  dcache       ram                      Failed
addr = 00000000, exp = FFFFFFFF, obs = 00000000
5.1.2  cache  dcache       address                  Failed
addr = 00000020, exp = 00000100, obs = 00000000
5.1.3  cache  dcache       tag                      Failed
addr = 00000020, exp = 08000000, obs = 00000000
5.1.4  cache  dcache       clear                    Failed
addr = 00000000, exp = 00000040, obs = 00000000
5.2.1  cache  icache       ram                      Failed
addr = 00000000, exp = FFFFFFFF, obs = 00000000
5.2.2  cache  icache       address                  Failed
addr = 00080020, exp = 00080000, obs = 00000000
5.2.3  cache  icache       tag                      Failed
addr = 00004004, exp = 00004201, obs = 00000000
5.2.4  cache  icache       clear                    Failed
addr = 00000000, exp = 00000500, obs = 00000000
5.3.1  cache  ecache       ram                      Failed
No ecache detected
5.3.2  cache  ecache       address                  Failed
No ecache detected
5.3.3  cache  ecache       tag                      Failed
No ecache detected
5.4.1  cache  snoop        ram                      Failed
addr = 20000000, exp = 80000008, obs = 00000000
6.1.1  i/o    counters     processor user timer     Failed
Limit bit not set
6.1.2  i/o    counters     processor counter        Pass
6.1.3  i/o    counters     system counter           Pass
6.2.1  i/o    lance        getid                    Pass
6.2.2  i/o    lance        csr                      Failed
addr = 10001004, exp = 78400010, obs = 00000000
6.2.3  i/o    lance        rap                      Failed
addr = 10001004, exp = 0002, obs = 0000
6.2.4  i/o    lance        rdp                      Failed
addr = 10001004, exp = 0000, obs = 0000
6.3.1  i/o    esp          register r/w             Pass
6.3.2  i/o    esp          config reg               Pass
6.3.3  i/o    esp          fifo access              ESP ERROR:
esp_mem_readb: PIO data read not implemented
Failed
addr = 78800008, exp = 89, obs = 00
6.3.4  i/o    esp          command reg              Pass
6.4.1  i/o    pp           register access          Pass
6.4.2  i/o    pp           io readback              Failed
addr = 7C800016, exp = 01, obs = 00
6.4.3  i/o    pp           tcr readback             Failed
addr = 7C800015, exp = 01, obs = 00
6.5.1  i/o    tod          regs test                Failed
addr = 00002B41, exp = 7F, obs = 35
6.5.2  i/o    tod          nvram access             Pass
7.1.1  intr   regs         sys                      Pass
7.1.2  intr   regs         proc                     Pass
7.2.1  intr   software     interrupts disabled      Pass
7.2.2  intr   software     interrupts enabled       Failed
Interrupt not detected
Unexpected trap detected : 00000002 1
MFSR = 00000000, MFAR = 00000000
       ERR      0
       SC       0
       ICPA     0
       S        0
       CP       0
       ME       0
       AFXTO    0
       PERR     0
       BM       0
       C        0
       TYPE     0
SFSR = 00000000, SFAR = 00000000
       CS       0
       PE       0
       TO       0
       BE       0
       L        0
       AT       0
       FT       0
       FAV      0
       OW       0
AFSR = 00800000, AFAR = 00000000
       ERR      0
       LE       0
       TO       0
       BE       0
       SIZE     0
       S        0
       ME       0
       RD       0
       FAV      0
7.2.3  intr   software     multi                    Failed
Interrupt not detected
Unexpected trap detected : 00008002 2
MFSR = 00000000, MFAR = 00000000
       ERR      0
       SC       0
       ICPA     0
       S        0
       CP       0
       ME       0
       AFXTO    0
       PERR     0
       BM       0
       C        0
       TYPE     0
SFSR = 00000000, SFAR = 00000000
       CS       0
       PE       0
       TO       0
       BE       0
       L        0
       AT       0
       FT       0
       FAV      0
       OW       0
AFSR = 00800000, AFAR = 00000000
       ERR      0
       LE       0
       TO       0
       BE       0
       SIZE     0
       S        0
       ME       0
       RD       0
       FAV      0
7.3.1  intr   pp           Interrupts               Failed
Interrupt not detected
7.4.1  intr   timer        system counter           Failed
Interrupt not detected
7.4.2  intr   timer        process counter          Failed
Interrupt not detected
8.1.1  dma    apc          bypass                   Failed
Timeout waiting for capture to complete
8.1.2  dma    apc          iommu                    Failed
Timeout waiting for capture to complete
8.1.3  dma    apc          snoop                    Failed
APC DMA timeout, csr = 0000001C

                 reply	other threads:[~2009-08-19 10:36 UTC|newest]

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