[Qemu-devel] [PATCH] sparc32 irq clearing (guest Solaris performance+NetBSD) fix

[Artyom Tarasenko <atar4qemu@googlemail.com>]

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According to NCR89C105 documentation
http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR89C105.txt

Interrupts are cleared by disabling and then re-enabling them.
This patch implements the specified behaviour. The most visible effects:
- NetBSD 1.3.3 - 1.5.3 boots successfully
- Solaris 2.5.1 - 7 boots ~1500 times faster (~20 seconds instead of ~8 hours)

Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
---
diff --git a/hw/slavio_intctl.c b/hw/slavio_intctl.c
index 9680392..779c661 100644
--- a/hw/slavio_intctl.c
+++ b/hw/slavio_intctl.c
@@ -177,19 +177,19 @@ static void slavio_intctlm_mem_writel(void
*opaque, target_phys_addr_t addr,
     saddr = addr >> 2;
     DPRINTF("write system reg 0x" TARGET_FMT_plx " = %x\n", addr, val);
     switch (saddr) {
-    case 2: // clear (enable)
+    case 2: // clear (enable, clear formerly disabled pending)
         // Force clear unused bits
         val &= MASTER_IRQ_MASK;
+        s->intregm_pending &= (s->intregm_disabled & val);
         s->intregm_disabled &= ~val;
         DPRINTF("Enabled master irq mask %x, curmask %x\n", val,
                 s->intregm_disabled);
         slavio_check_interrupts(s, 1);
         break;
-    case 3: // set (disable, clear pending)
+    case 3: // set (disable, do not clear pending)
         // Force clear unused bits
         val &= MASTER_IRQ_MASK;
         s->intregm_disabled |= val;
-        s->intregm_pending &= ~val;
         slavio_check_interrupts(s, 1);
         DPRINTF("Disabled master irq mask %x, curmask %x\n", val,
                 s->intregm_disabled);

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Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
---
diff --git a/hw/slavio_intctl.c b/hw/slavio_intctl.c
index 9680392..779c661 100644
--- a/hw/slavio_intctl.c
+++ b/hw/slavio_intctl.c
@@ -177,19 +177,19 @@ static void slavio_intctlm_mem_writel(void *opaque, target_phys_addr_t addr,
     saddr = addr >> 2;
     DPRINTF("write system reg 0x" TARGET_FMT_plx " = %x\n", addr, val);
     switch (saddr) {
-    case 2: // clear (enable)
+    case 2: // clear (enable, clear formerly disabled pending)
         // Force clear unused bits
         val &= MASTER_IRQ_MASK;
+        s->intregm_pending &= (s->intregm_disabled & val);
         s->intregm_disabled &= ~val;
         DPRINTF("Enabled master irq mask %x, curmask %x\n", val,
                 s->intregm_disabled);
         slavio_check_interrupts(s, 1);
         break;
-    case 3: // set (disable, clear pending)
+    case 3: // set (disable, do not clear pending)
         // Force clear unused bits
         val &= MASTER_IRQ_MASK;
         s->intregm_disabled |= val;
-        s->intregm_pending &= ~val;
         slavio_check_interrupts(s, 1);
         DPRINTF("Disabled master irq mask %x, curmask %x\n", val,
                 s->intregm_disabled);