From: Paolo Bonzini <pbonzini@redhat.com>
To: "Gerd Hoffmann" <kraxel@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@redhat.com>
Cc: QEMU Developers <qemu-devel@nongnu.org>,
Richard Henderson <rth@twiddle.net>
Subject: Re: [Qemu-devel] hw/display/vga: Why architecture specific code?
Date: Thu, 4 Jul 2019 16:04:32 +0200 [thread overview]
Message-ID: <fb96921e-f751-a6e4-6e2f-5aaefa38ba6a@redhat.com> (raw)
In-Reply-To: <20190704135550.x75fdmzezl3be5xk@sirius.home.kraxel.org>
On 04/07/19 15:55, Gerd Hoffmann wrote:
> On Thu, Jul 04, 2019 at 03:27:25PM +0200, Philippe Mathieu-Daudé wrote:
>> Hi Gerd,
>>
>> I'm looking at:
>>
>> static const MemoryRegionPortio vbe_portio_list[] = {
>> { 0, 1, 2, .read = vbe_ioport_read_index, .write =
>> vbe_ioport_write_index },
>> # ifdef TARGET_I386
>> { 1, 1, 2, .read = vbe_ioport_read_data, .write =
>> vbe_ioport_write_data },
>> # endif
>> { 2, 1, 2, .read = vbe_ioport_read_data, .write =
>> vbe_ioport_write_data },
>> PORTIO_END_OF_LIST(),
>> };
>
> Unaligned 16bit ioport access works on x86 only.
But I'm not sure that it needs to be target-dependent now. Worst case
you'd have a dead MemoryRegion.
Paolo
prev parent reply other threads:[~2019-07-04 14:05 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-04 13:27 [Qemu-devel] hw/display/vga: Why architecture specific code? Philippe Mathieu-Daudé
2019-07-04 13:55 ` Gerd Hoffmann
2019-07-04 14:04 ` Paolo Bonzini [this message]
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