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[88.18.140.237]) by smtp.gmail.com with ESMTPSA id z26sm686499ejr.95.2020.10.27.02.55.04 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 27 Oct 2020 02:55:05 -0700 (PDT) Subject: Re: [PATCH v2 18/19] block/nvme: Switch to using the MSIX API To: Auger Eric , qemu-devel@nongnu.org References: <20201026105504.4023620-1-philmd@redhat.com> <20201026105504.4023620-19-philmd@redhat.com> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Message-ID: Date: Tue, 27 Oct 2020 10:55:03 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.3.1 MIME-Version: 1.0 In-Reply-To: Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=63.128.21.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/10/27 01:06:07 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -42 X-Spam_score: -4.3 X-Spam_bar: ---- X-Spam_report: (-4.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-2.167, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fam Zheng , Kevin Wolf , qemu-block@nongnu.org, Max Reitz , Alex Williamson , Stefan Hajnoczi Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 10/26/20 9:32 PM, Auger Eric wrote: > Hi Philippe, > > On 10/26/20 11:55 AM, Philippe Mathieu-Daudé wrote: >> In preparation of using multiple IRQs, switch to using the recently >> introduced MSIX API. Instead of allocating and assigning IRQ in >> a single step, we now have to use two distinct calls. >> >> Reviewed-by: Stefan Hajnoczi >> Signed-off-by: Philippe Mathieu-Daudé >> --- >> block/nvme.c | 14 ++++++++++++-- >> 1 file changed, 12 insertions(+), 2 deletions(-) >> >> diff --git a/block/nvme.c b/block/nvme.c >> index 46b09b3a3a7..191678540b6 100644 >> --- a/block/nvme.c >> +++ b/block/nvme.c >> @@ -693,6 +693,7 @@ static int nvme_init(BlockDriverState *bs, const char *device, int namespace, >> size_t device_page_size_min; >> size_t device_page_size_max; >> size_t iommu_page_size_min = 4096; >> + unsigned irq_count = MSIX_IRQ_COUNT; >> >> qemu_co_mutex_init(&s->dma_map_lock); >> qemu_co_queue_init(&s->dma_flush_queue); >> @@ -809,8 +810,17 @@ static int nvme_init(BlockDriverState *bs, const char *device, int namespace, >> } >> } >> >> - ret = qemu_vfio_pci_init_irq(s->vfio, s->irq_notifier, >> - VFIO_PCI_MSIX_IRQ_INDEX, errp); >> + ret = qemu_vfio_pci_msix_init_irqs(s->vfio, &irq_count, errp); >> + if (ret) { >> + if (ret == -EOVERFLOW) { >> + error_append_hint(errp, "%u IRQs requested but only %u available\n", >> + MSIX_IRQ_COUNT, irq_count); > This message can be directly printed in qemu_vfio_pci_msix_init_irqs() Good idea, thanks.