From: "Cédric Le Goater" <clg@kaod.org>
To: David Gibson <david@gibson.dropbear.id.au>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
Andrea Bolognani <abologna@redhat.com>,
"Michael S. Tsirkin" <mst@redhat.com>
Subject: Re: [Qemu-devel] [PATCH v3 0/1] ppc/pnv: Add model for Power8 PHB3 PCIe Host bridge
Date: Tue, 30 Oct 2018 19:35:10 +0100 [thread overview]
Message-ID: <fce4bbb4-6eb0-16e9-0da4-ac1147b0ddab@kaod.org> (raw)
In-Reply-To: <20180913021138.GQ7978@umbus.fritz.box>
Hello,
On 9/13/18 4:11 AM, David Gibson wrote:
> On Wed, Sep 12, 2018 at 10:04:05AM +0200, Cédric Le Goater wrote:
>> On 07/30/2018 07:17 PM, Cédric Le Goater wrote:
>>> This is a model of the PCIe Host Bridge (PHB3) controller found on a
>>> Power8 processor. The Power8 processor comes in different flavors:
>>> Venice, Murano, Naple, each having a different number of PHBs. Multi
>>> chip is supported, each chip adding its set of PHB3 controllers.
>>>
>>> There is no default device layout and PCI devices should be added to
>>> the machine using command line options such as :
>>>
>>> -device e1000e,netdev=net0,mac=C0:FF:EE:00:00:02,bus=pcie.0,addr=0x0
>>> -netdev bridge,id=net0,helper=/usr/libexec/qemu-bridge-helper,br=virbr0,id=hostnet0
>>>
>>> -device megasas,id=scsi0,bus=pcie.1,addr=0x0
>>> -drive file=$disk,if=none,id=drive-scsi0-0-0-0,format=qcow2,cache=none
>>> -device scsi-hd,bus=scsi0.0,channel=0,scsi-id=0,lun=0,drive=drive-scsi0-0-0-0,id=scsi0-0-0-0,bootindex=2
>>>
>>> Git tree available here for testing, based on David's branch:
>>>
>>> https://github.com/legoater/qemu/tree/phb3-3.0
>>>
>>
>> Would it be possible to have some feedback on this model ? It has proved
>> to be useful these last years and it has been extensively modified to
>> to fit mainline best practices.
>
> Yeah, sorry, I've just been swamped with higher priority stuff.
>
The patch still applies correctly on top of the future 3.1.
What more is expected for this model ?
It would be nice to complete P8 before sending the support for the
P9 Processor.
Thanks,
C.
prev parent reply other threads:[~2018-10-30 18:35 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-30 17:17 [Qemu-devel] [PATCH v3 0/1] ppc/pnv: Add model for Power8 PHB3 PCIe Host bridge Cédric Le Goater
2018-07-30 17:17 ` [Qemu-devel] [PATCH v3 1/1] " Cédric Le Goater
2018-11-30 4:26 ` David Gibson
2018-11-30 8:21 ` Cédric Le Goater
2018-09-12 8:04 ` [Qemu-devel] [PATCH v3 0/1] " Cédric Le Goater
2018-09-13 2:11 ` David Gibson
2018-10-30 18:35 ` Cédric Le Goater [this message]
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