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[174.21.75.75]) by smtp.gmail.com with ESMTPSA id a13sm592312pfv.66.2021.12.14.11.29.52 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 14 Dec 2021 11:29:53 -0800 (PST) Subject: Re: [PATCH v9 28/31] common-user: Add safe syscall handling for loongarch64 hosts To: WANG Xuerui , qemu-devel@nongnu.org References: <20211214080154.196350-1-git@xen0n.name> <20211214080154.196350-29-git@xen0n.name> From: Richard Henderson Message-ID: Date: Tue, 14 Dec 2021 11:29:51 -0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.14.0 MIME-Version: 1.0 In-Reply-To: <20211214080154.196350-29-git@xen0n.name> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::62b (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::62b; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62b.google.com X-Spam_score_int: -22 X-Spam_score: -2.3 X-Spam_bar: -- X-Spam_report: (-2.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.962, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , XiaoJuan Yang , Song Gao , =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= , =?UTF-8?Q?Alex_Benn=c3=a9e?= , Laurent Vivier Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 12/14/21 12:01 AM, WANG Xuerui wrote: > + move $t0, $a0 /* signal_pending pointer */ ... > +safe_syscall_start: > + /* If signal_pending is non-zero, don't do the call */ > + ld.w $t1, $t0, 0 > + bnez $t1, 2f > + syscall 0 We need a non-syscall clobbered register for signal_pending, per the bug fixed in 5d9f3ea0817215ad4baac5aa30414e9ebbaaf0d6. In the case of riscv, because of the way exceptions are delivered, there are no syscall-clobbered registers (by the time syscall is distinguished from interrupt, all registers have been saved). In the case of mips, there are no non-syscall-clobbered registers that are not also call-saved or syscall arguments, so I had to allocate a stack frame and save/restore s0. For loongarch64, according to glibc, #define __SYSCALL_CLOBBERS \ "$t0", "$t1", "$t2", "$t3", "$t4", "$t5", "$t6", "$t7", "$t8", "memory" which does suggest that a6 is unused, saved across the syscall, and also call-clobbered (so we don't have to allocate a stack frame). I've had a browse through the loongarch kernel code and that seems to be all true. (Curiously, loongarch restores more registers than it saves on the way out of handle_syscall. There may be a subtle reason for that, or room for improvement.) r~