From: Mark Cave-Ayland <mark.caveayland@nutanix.com>
To: Xiaoyao Li <xiaoyao.li@intel.com>,
pbonzini@redhat.com, mst@redhat.com, marcel.apfelbaum@gmail.com,
eduardo@habkost.net, imammedo@redhat.com, qemu-devel@nongnu.org
Subject: Re: [PATCH v6 09/19] hw/i386/pc_piix.c: simplify RAM size logic in pc_init_isa()
Date: Wed, 27 Aug 2025 12:00:27 +0100 [thread overview]
Message-ID: <fd631cee-4089-400a-a79f-0091341fec1f@nutanix.com> (raw)
In-Reply-To: <7fa8968e-c584-4441-8859-a40788067e95@intel.com>
On 26/08/2025 11:01, Xiaoyao Li wrote:
> On 8/22/2025 8:11 PM, Mark Cave-Ayland wrote:
>> All isapc machines must have 32-bit CPUs and so the RAM split logic
>> can be hardcoded
>> accordingly.
>>
>> Signed-off-by: Mark Cave-Ayland <mark.caveayland@nutanix.com>
>> ---
>> hw/i386/pc_piix.c | 58 ++++-------------------------------------------
>> 1 file changed, 4 insertions(+), 54 deletions(-)
>>
>> diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
>> index 816124c027..fc94937ad4 100644
>> --- a/hw/i386/pc_piix.c
>> +++ b/hw/i386/pc_piix.c
>> @@ -444,69 +444,19 @@ static void pc_init_isa(MachineState *machine)
>> GSIState *gsi_state;
>> MemoryRegion *ram_memory;
>> MemoryRegion *rom_memory = system_memory;
>> - ram_addr_t lowmem;
>> uint64_t hole64_size = 0;
>> /*
>> - * Calculate ram split, for memory below and above 4G. It's a bit
>> - * complicated for backward compatibility reasons ...
>> - *
>> - * - Traditional split is 3.5G (lowmem = 0xe0000000). This is the
>> - * default value for max_ram_below_4g now.
>> - *
>> - * - Then, to gigabyte align the memory, we move the split to 3G
>> - * (lowmem = 0xc0000000). But only in case we have to split in
>> - * the first place, i.e. ram_size is larger than (traditional)
>> - * lowmem. And for new machine types (gigabyte_align = true)
>> - * only, for live migration compatibility reasons.
>> - *
>> - * - Next the max-ram-below-4g option was added, which allowed to
>> - * reduce lowmem to a smaller value, to allow a larger PCI I/O
>> - * window below 4G. qemu doesn't enforce gigabyte alignment
>> here,
>> - * but prints a warning.
>> - *
>> - * - Finally max-ram-below-4g got updated to also allow raising
>> lowmem,
>> - * so legacy non-PAE guests can get as much memory as possible in
>> - * the 32bit address space below 4G.
>> - *
>> - * - Note that Xen has its own ram setup code in xen_ram_init(),
>> - * called via xen_hvm_init_pc().
>> - *
>> - * Examples:
>> - * qemu -M pc-1.7 -m 4G (old default) -> 3584M low,
>> 512M high
>> - * qemu -M pc -m 4G (new default) -> 3072M low,
>> 1024M high
>> - * qemu -M pc,max-ram-below-4g=2G -m 4G -> 2048M low,
>> 2048M high
>> - * qemu -M pc,max-ram-below-4g=4G -m 3968M -> 3968M low
>> (=4G-128M)
>> + * There is no RAM split for the isapc machine
>> */
>> if (xen_enabled()) {
>> xen_hvm_init_pc(pcms, &ram_memory);
>> } else {
>> ram_memory = machine->ram;
>> - if (!pcms->max_ram_below_4g) {
>> - pcms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */
>> - }
>> - lowmem = pcms->max_ram_below_4g;
>> - if (machine->ram_size >= pcms->max_ram_below_4g) {
>> - if (pcmc->gigabyte_align) {
>> - if (lowmem > 0xc0000000) {
>> - lowmem = 0xc0000000;
>> - }
>> - if (lowmem & (1 * GiB - 1)) {
>> - warn_report("Large machine and max_ram_below_4g "
>> - "(%" PRIu64 ") not a multiple of 1G; "
>> - "possible bad performance.",
>> - pcms->max_ram_below_4g);
>> - }
>> - }
>> - }
>> - if (machine->ram_size >= lowmem) {
>> - x86ms->above_4g_mem_size = machine->ram_size - lowmem;
>> - x86ms->below_4g_mem_size = lowmem;
>> - } else {
>> - x86ms->above_4g_mem_size = 0;
>> - x86ms->below_4g_mem_size = machine->ram_size;
>> - }
>> + pcms->max_ram_below_4g = 4 * GiB;
>> + x86ms->above_4g_mem_size = 0;
>> + x86ms->below_4g_mem_size = machine->ram_size;
>
> I think we need to sanity check the machine->ram_size is not bigger than
> 4G, and error out if it exceeds.
Amazingly there is currently no limit for the isapc machine, but I shall
add it in for v7.
>> }
>> /*
ATB,
Mark.
next prev parent reply other threads:[~2025-08-27 11:01 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-22 12:11 [PATCH v6 00/19] hw/i386: separate isapc out from pc_piix Mark Cave-Ayland
2025-08-22 12:11 ` [PATCH v6 01/19] hw/i386/pc_piix.c: restrict isapc machine to 32-bit CPUs Mark Cave-Ayland
2025-08-26 7:25 ` Xiaoyao Li
2025-08-27 11:10 ` Mark Cave-Ayland
2025-08-27 11:46 ` Daniel P. Berrangé
2025-08-27 11:50 ` Xiaoyao Li
2025-08-28 10:42 ` Mark Cave-Ayland
2025-08-22 12:11 ` [PATCH v6 02/19] hw/i386/pc_piix.c: remove include for loader.h Mark Cave-Ayland
2025-08-26 7:30 ` Xiaoyao Li
2025-08-22 12:11 ` [PATCH v6 03/19] hw/i386/pc_piix.c: inline pc_xen_hvm_init_pci() into pc_xen_hvm_init() Mark Cave-Ayland
2025-08-26 7:34 ` Xiaoyao Li
2025-08-22 12:11 ` [PATCH v6 04/19] hw/i386/pc_piix.c: duplicate pc_init1() into pc_isa_init() Mark Cave-Ayland
2025-08-26 9:21 ` Xiaoyao Li
2025-08-27 10:47 ` Mark Cave-Ayland
2025-08-22 12:11 ` [PATCH v6 05/19] hw/i386/pc_piix.c: remove pcmc->pci_enabled dependent initialisation from pc_init_isa() Mark Cave-Ayland
2025-08-26 9:48 ` Xiaoyao Li
2025-08-22 12:11 ` [PATCH v6 06/19] hw/i386/pc_piix.c: remove SMI and piix4_pm " Mark Cave-Ayland
2025-08-26 9:52 ` Xiaoyao Li
2025-08-22 12:11 ` [PATCH v6 07/19] hw/i386/pc_piix.c: remove SGX " Mark Cave-Ayland
2025-08-26 11:55 ` Xiaoyao Li
2025-08-22 12:11 ` [PATCH v6 08/19] hw/i386/pc_piix.c: remove nvdimm " Mark Cave-Ayland
2025-08-26 11:56 ` Xiaoyao Li
2025-08-22 12:11 ` [PATCH v6 09/19] hw/i386/pc_piix.c: simplify RAM size logic in pc_init_isa() Mark Cave-Ayland
2025-08-22 14:58 ` Philippe Mathieu-Daudé
2025-08-26 10:01 ` Xiaoyao Li
2025-08-27 11:00 ` Mark Cave-Ayland [this message]
2025-08-28 8:41 ` Mark Cave-Ayland
2025-08-22 12:11 ` [PATCH v6 10/19] hw/i386/pc_piix.c: hardcode hole64_size to 0 " Mark Cave-Ayland
2025-08-26 11:57 ` Xiaoyao Li
2025-08-22 12:11 ` [PATCH v6 11/19] hw/i386/pc_piix.c: remove pc_system_flash_cleanup_unused() from pc_init_isa() Mark Cave-Ayland
2025-08-22 12:11 ` [PATCH v6 12/19] hw/i386/pc_piix.c: always initialise ISA IDE drives in pc_init_isa() Mark Cave-Ayland
2025-08-26 12:01 ` Xiaoyao Li
2025-08-22 12:11 ` [PATCH v6 13/19] hw/i386/pc_piix.c: assume pcmc->pci_enabled is always false " Mark Cave-Ayland
2025-08-26 9:50 ` Xiaoyao Li
2025-08-27 11:32 ` Mark Cave-Ayland
2025-08-22 12:12 ` [PATCH v6 14/19] hw/i386/pc_piix.c: hardcode pcms->pci_bus to NULL " Mark Cave-Ayland
2025-08-26 12:03 ` Xiaoyao Li
2025-08-22 12:12 ` [PATCH v6 15/19] hw/i386/pc_piix.c: assume pcmc->pci_enabled is always true in pc_init1() Mark Cave-Ayland
2025-08-26 12:09 ` Xiaoyao Li
2025-08-27 11:54 ` Mark Cave-Ayland
2025-08-22 12:12 ` [PATCH v6 16/19] hw/i386: move isapc machine to separate isapc.c file Mark Cave-Ayland
2025-08-26 12:10 ` Xiaoyao Li
2025-08-22 12:12 ` [PATCH v6 17/19] hw/i386/pc_piix.c: remove unused headers after isapc machine split Mark Cave-Ayland
2025-08-26 12:10 ` Xiaoyao Li
2025-08-22 12:12 ` [PATCH v6 18/19] hw/i386/pc_piix.c: replace rom_memory with pci_memory Mark Cave-Ayland
2025-08-26 12:11 ` Xiaoyao Li
2025-08-22 12:12 ` [PATCH v6 19/19] hw/i386/isapc.c: replace rom_memory with system_memory Mark Cave-Ayland
2025-08-26 12:12 ` Xiaoyao Li
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