From: Richard Henderson <richard.henderson@linaro.org>
To: Michael Rolnik <mrolnik@gmail.com>
Cc: "Sarah Harris" <S.E.Harris@kent.ac.uk>,
"Alex Bennée" <alex.bennee@linaro.org>,
"QEMU Developers" <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH RFC v20 3/8] target/avr: Add mechanism to check for active debugger connection
Date: Wed, 5 Jun 2019 11:06:51 -0500 [thread overview]
Message-ID: <fd701964-3e5e-fde2-1103-d38881a39129@linaro.org> (raw)
In-Reply-To: <CAK4993jPs_j9qvv8v2sfZ=npGkbkMAv3HaWSYRiSqFthkvfmdA@mail.gmail.com>
On 6/5/19 10:19 AM, Michael Rolnik wrote:
> Richard.
>
> We use break instruction for testing.
> (Here https://github.com/seharris/qemu-avr-tests/tree/master/instruction-tests).
> Each test is a big list of small tests with a break between them. We run the
> tests on HW and on QEMU then compare register after each break. If we don't
> implement break the way Sarah suggested we have no way of testing.
> What do you suggest?
Hmm.
Ordinarily I would say to use some sort of syscall/exception/interrupt
instruction, but I see that avr doesn't have any of those.
You could use "call breakpoint" instead of using raw BREAK instructions with
the implementation just being
breakpoint:
ret
and have gdb issue "break breakpoint" before beginning.
But perhaps I'm being over-pedantic about this, and someone else should weigh
in. Alex, I nominate you since you most recently touched gdbserver. ;-)
r~
next prev parent reply other threads:[~2019-06-05 16:08 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-30 19:07 [Qemu-devel] [PATCH RFC v20 0/8] QEMU AVR 8 bit cores Michael Rolnik
2019-05-30 19:07 ` [Qemu-devel] [PATCH RFC v20 1/8] target/avr: Add outward facing interfaces and core CPU logic Michael Rolnik
2019-05-31 8:02 ` Igor Mammedov
2019-05-31 8:15 ` Michael Rolnik
2019-05-31 9:56 ` Igor Mammedov
2019-05-30 19:07 ` [Qemu-devel] [PATCH RFC v20 2/8] target/avr: Add instruction helpers Michael Rolnik
2019-05-31 13:50 ` Richard Henderson
2019-05-30 19:07 ` [Qemu-devel] [PATCH RFC v20 3/8] target/avr: Add mechanism to check for active debugger connection Michael Rolnik
2019-05-31 13:54 ` Richard Henderson
2019-06-01 21:12 ` Michael Rolnik
2019-06-03 15:44 ` Richard Henderson
2019-06-03 16:29 ` Michael Rolnik
2019-06-03 16:36 ` Richard Henderson
2019-06-03 17:04 ` Michael Rolnik
2019-06-05 7:20 ` Michael Rolnik
2019-06-05 14:36 ` Richard Henderson
2019-06-05 15:19 ` Michael Rolnik
2019-06-05 16:06 ` Richard Henderson [this message]
2019-06-05 16:10 ` Alex Bennée
2019-06-05 17:57 ` Michael Rolnik
2019-05-30 19:07 ` [Qemu-devel] [PATCH RFC v20 4/8] target-avr: Add instruction decoding Michael Rolnik
2019-05-31 14:45 ` Richard Henderson
2019-06-03 20:13 ` Michael Rolnik
2019-06-03 21:48 ` Richard Henderson
2019-05-30 19:07 ` [Qemu-devel] [PATCH RFC v20 5/8] target/avr: Add instruction translation Michael Rolnik
2019-05-31 15:31 ` Richard Henderson
2019-06-02 3:44 ` Michael Rolnik
2019-06-03 15:31 ` Richard Henderson
2019-06-03 15:34 ` Michael Rolnik
2019-05-30 19:07 ` [Qemu-devel] [PATCH RFC v20 6/8] target/avr: Add limited support for USART and 16 bit timer peripherals Michael Rolnik
2019-05-30 19:07 ` [Qemu-devel] [PATCH RFC v20 7/8] target/avr: Add example board configuration Michael Rolnik
2019-05-31 8:06 ` Igor Mammedov
2019-05-30 19:07 ` [Qemu-devel] [PATCH RFC v20 8/8] target/avr: Register AVR support with the rest of QEMU, the build system, and the MAINTAINERS file Michael Rolnik
2019-05-31 14:50 ` Eric Blake
2019-06-01 21:20 ` Michael Rolnik
2019-06-03 19:47 ` Eric Blake
2019-06-03 19:53 ` Michael Rolnik
2019-05-30 20:16 ` [Qemu-devel] [PATCH RFC v20 0/8] QEMU AVR 8 bit cores no-reply
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