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From: Laszlo Ersek <lersek@redhat.com>
To: "Philippe Mathieu-Daudé" <philmd@redhat.com>,
	"Peter Maydell" <peter.maydell@linaro.org>
Cc: "Richard Henderson" <richard.henderson@linaro.org>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	"QEMU Developers" <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PULL 08/10] target/arm: Conditionalize some asserts on aarch32 support
Date: Wed, 17 Jul 2019 14:49:35 +0200	[thread overview]
Message-ID: <fdc1cb0b-6f0e-cce2-c275-ad999546d1f9@redhat.com> (raw)
In-Reply-To: <cf9156f6-c3fa-ec7e-c51a-8b8d2fd1e6d6@redhat.com>

On 07/17/19 11:22, Laszlo Ersek wrote:

> because, (A --> B) === (!A --> !B)

Obviously, it is impossible for me to write an email containing logical
formulae without at least one *crucial* typo.

The correct form of the above equivalence is:

  (A --> B) === (!B --> !A)

This typo does not affect the rest of my previous message -- while I
quoted the equivalence incorrectly, I did use it correctly.

Thanks & sorry
Laszlo


  parent reply	other threads:[~2019-07-17 12:49 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-02 17:16 [Qemu-devel] [PULL v3 00/10] target-arm queue Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 01/10] hw/arm/virt: Set VIRT_COMPAT_3_0 compat Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 02/10] hw/char: Implement nRF51 SoC UART Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 03/10] hw/arm/nrf51_soc: Connect UART to nRF51 SoC Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 04/10] tests/boot-serial-test: Add microbit board testcase Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 05/10] MAINTAINERS: Remove bouncing email in ARM ACPI Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 06/10] strongarm: mask off high[31:28] bits from dir and state registers Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 07/10] hw/arm/xilinx_zynq: Use the ARRAY_SIZE macro Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 08/10] target/arm: Conditionalize some asserts on aarch32 support Peter Maydell
2019-05-24 12:33   ` Laszlo Ersek
2019-05-24 12:45     ` Laszlo Ersek
2019-05-24 13:11     ` Philippe Mathieu-Daudé
2019-07-16 12:03     ` Peter Maydell
2019-07-16 14:02       ` Richard Henderson
2019-07-16 14:18         ` Peter Maydell
2019-07-16 15:04           ` Richard Henderson
2019-07-16 16:50       ` Laszlo Ersek
2019-07-16 16:59         ` Peter Maydell
2019-07-16 18:42           ` Laszlo Ersek
2019-07-16 20:10             ` Philippe Mathieu-Daudé
2019-07-17  8:36               ` Laszlo Ersek
2019-07-17  9:22                 ` Laszlo Ersek
2019-07-17  9:24                   ` Laszlo Ersek
2019-07-17 12:49                   ` Laszlo Ersek [this message]
2019-07-17 12:53                   ` Laszlo Ersek
2019-07-17 13:36                   ` Philippe Mathieu-Daudé
2019-07-17 13:46                     ` Peter Maydell
2019-07-17 15:08                       ` Laszlo Ersek
2019-07-18 12:30                         ` Peter Maydell
2019-07-18 19:07                           ` Laszlo Ersek
2019-07-17 13:45                   ` Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 09/10] hw/arm: versal: Add a model of Xilinx Versal SoC Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 10/10] hw/arm: versal: Add a virtual Xilinx Versal board Peter Maydell
2018-12-04 10:28   ` Peter Maydell
2018-12-12 22:05     ` Edgar E. Iglesias
2022-01-27 13:10   ` Peter Maydell
2022-01-30 10:33     ` Edgar E. Iglesias
2018-11-02 18:22 ` [Qemu-devel] [PULL v3 00/10] target-arm queue Peter Maydell

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