Re: [Qemu-devel] [PATCH v2] i386: Add some MSR based features on Cascadelake-Server CPU model

[Tao Xu <tao3.xu@intel.com>]

On 5/7/2019 11:06 PM, Eric Blake wrote:
> On 5/7/19 8:07 AM, Daniel P. Berrangé wrote:
>> On Tue, May 07, 2019 at 08:48:53PM +0800, Tao Xu wrote:
>>> As noted in
>>> http://lists.gnu.org/archive/html/qemu-devel/2018-09/msg02212.html
>>
>> Rather than pointing to the mailing list post, please just refer
>> to the git commit hash that patch was merged under, which IIUC
>> is c7a88b52f62b30c04158eeb07f73e3f72221b6a8.
>>
>>> Because MSR based feature has been supported by QEMU,
>>> we add CPUID_7_0_EDX_ARCH_CAPABILITIES on Cascadelake-Server CPU
>>> model, and add IA32_ARCH_CAPABILITIES MSR based features (RDCL_NO,
>>> IBRS_ALL and SKIP_L1DFL_VMENTRY).
>>>
>>> And "014018e19b i386: Make arch_capabilities migratable" has been
>>> in QEMU upstream, the CPUID_7_0_EDX_ARCH_CAPABILITIES can be
>>> safely added into CPU Model.
> 
> Also, this paragraph:
> 
>>>
>>> Changes in v2:
>>>      - rebased patch to latest qemu base
> 
> is useful to the list reader but not to the permanent git history, so it
> belongs better...
> 
>>>
>>> Signed-off-by: Tao Xu <tao3.xu@intel.com>
>>> ---
> 
> ...here, after the --- marker, so that 'git am' will strip it on the
> maintainer's behalf when they prepare the patch for a pull request.
>

Thank your for your suggestion, Eric. I will rewrite my commit message.