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From: "Wu, Fei" <fei2.wu@intel.com>
To: Andrew Jones <ajones@ventanamicro.com>
Cc: Alistair Francis <alistair23@gmail.com>,
	Atish Kumar Patra <atishp@rivosinc.com>, <pbonzini@redhat.com>,
	<palmer@dabbelt.com>, <alistair.francis@wdc.com>,
	<bin.meng@windriver.com>, <liwei1518@gmail.com>,
	<dbarboza@ventanamicro.com>, <zhiwei_liu@linux.alibaba.com>,
	<qemu-devel@nongnu.org>, <qemu-riscv@nongnu.org>,
	<andrei.warkentin@intel.com>, <shaolin.xie@alibaba-inc.com>,
	<ved@rivosinc.com>, <sunilvl@ventanamicro.com>,
	<haibo1.xu@intel.com>, <evan.chai@intel.com>,
	<yin.wang@intel.com>, <tech-server-platform@lists.riscv.org>,
	<tech-server-soc@lists.riscv.org>
Subject: Re: [RISC-V][tech-server-platform] [RFC 1/2] hw/riscv: Add server platform reference machine
Date: Mon, 11 Mar 2024 19:55:05 +0800	[thread overview]
Message-ID: <fee8e89a-7d87-43b8-bc87-af76a67c4317@intel.com> (raw)
In-Reply-To: <20240308-48ff9db3408048d387d6cfa4@orel>

On 3/8/2024 5:20 PM, Andrew Jones wrote:
> On Thu, Mar 07, 2024 at 02:26:18PM +0800, Wu, Fei wrote:
>> On 3/7/2024 8:48 AM, Alistair Francis wrote:
>>> On Thu, Mar 7, 2024 at 5:13 AM Atish Kumar Patra <atishp@rivosinc.com> wrote:
>>>>
>>>> On Wed, Mar 6, 2024 at 4:56 AM Wu, Fei <fei2.wu@intel.com> wrote:
>>>>>
>>>>> On 3/6/2024 8:19 AM, Alistair Francis wrote:
>>>>>> On Mon, Mar 4, 2024 at 8:28 PM Fei Wu <fei2.wu@intel.com> wrote:
> ...
>>>>>>> +config SERVER_PLATFORM_REF
>>>>>>> +    bool
>>>>>>> +    select RISCV_NUMA
>>>>>>> +    select GOLDFISH_RTC
>>>>>>> +    select PCI
>>>>>>> +    select PCI_EXPRESS_GENERIC_BRIDGE
>>>>>>> +    select PFLASH_CFI01
>>>>>>> +    select SERIAL
>>>>>>> +    select RISCV_ACLINT
>>>>>>> +    select RISCV_APLIC
>>>>>>> +    select RISCV_IMSIC
>>>>>>> +    select SIFIVE_TEST
>>>>>>
>>>>>> Do we really need SiFive Test in the server platform?
>>>>>>
>>>>> It's used to reset the system, is there any better choice?
>>>
>>> If we add this now we are stuck with it forever (or at least a long
>>> time). So it'd be nice to think about these and decide if these really
>>> are the best way to do things. We don't have to just copy the existing
>>> virt machine.
>>>
>> We need a solution to poweroff/reboot, and sifive test is one of the
>> hardware implementations, so in general I think it's okay. But I agree
>> Sifive test looks a device for testing only.
>>
>>> There must be a more standard way to do this then MMIO mapped SiFive hardware?
>>>
>> The mapped MMIO mechanism leveraged by Sifive test by itself is kinda
>> generic, the sbsa_ec for sbsa-ref is also an MMIO mapped device. These
>> two devices look very similar except different encodings of the
>> shutdown/reboot command.
>>
>> Probably we can have a generic shutdown/reboot device in QEMU for both
>> sifive test and sbsa_ec, and likely more (not in this patch series). In
>> this way, sifive test device will be replaced by this more generic
>> device. Any suggestions?
> 
> Operating systems shouldn't need to implement odd-ball device drivers to
> function on a reference of a standard platform. So the reference platform
> should only be comprised of devices which have specifications and already,
> or will, have DT bindings. Generic devices would be best, but I don't
> think it should be a problem to use devices from multiple vendors. The
> devices just need to allow GPL drivers to be written. With all that in
> mind, what about adding a generic GPIO controller or using SiFive's GPIO
> controller. Then, we could add gpio-restart and gpio-poweroff.
> 
I agree with most of what you said. Regarding generic devices, syscon
looks a better choice than gpio in the current situation.

Linux kernel has these configurations enabled for virt, and I'm not
going to add a new soc for this new board currently, we can use the same
syscon interface for power, and it has already well supported.

config SOC_VIRT
	bool "QEMU Virt Machine"
	select CLINT_TIMER if RISCV_M_MODE
	select POWER_RESET
	select POWER_RESET_SYSCON
	select POWER_RESET_SYSCON_POWEROFF
	select GOLDFISH

For the qemu part, we can remove device 'sifive_test' and manage that
memory region directly with MemoryRegionOps, similar to what
hw/mips/boston.c does.

Thanks,
Fei.

> Thanks,
> drew
> 
> 
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> 



  reply	other threads:[~2024-03-11 11:55 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-04 10:25 [RFC 0/2] Add RISC-V Server Platform Reference Board Fei Wu
2024-03-04 10:25 ` [RFC 1/2] hw/riscv: Add server platform reference machine Fei Wu
2024-03-04 19:35   ` Daniel Henrique Barboza
2024-03-05  5:56     ` Wu, Fei
2024-03-05  9:15       ` Daniel Henrique Barboza
2024-03-06  0:19   ` Alistair Francis
2024-03-06 12:55     ` Wu, Fei
2024-03-06 19:13       ` Atish Kumar Patra
2024-03-07  0:48         ` Alistair Francis
2024-03-07  6:26           ` Wu, Fei
2024-03-08  9:20             ` Andrew Jones
2024-03-11 11:55               ` Wu, Fei [this message]
2024-03-11 14:38                 ` [RISC-V][tech-server-soc] [RISC-V][tech-server-platform] " Andrew Jones
2024-03-12  0:19                   ` Atish Kumar Patra
2024-03-06  0:27   ` Conor Dooley
2024-03-06  2:41     ` Wu, Fei
2024-03-04 10:25 ` [RFC 2/2] target/riscv: Add server platform reference cpu Fei Wu
2024-03-04 19:43   ` Daniel Henrique Barboza
2024-03-05  5:58     ` [RISC-V][tech-server-soc] " Wu, Fei
2024-03-06 13:26       ` Wu, Fei
2024-03-07  7:36         ` Wu, Fei
2024-03-07 12:17           ` [RISC-V][tech-server-platform] " Heinrich Schuchardt
2024-03-07 19:27             ` Daniel Henrique Barboza
2024-03-07 19:15           ` Daniel Henrique Barboza
2024-03-12 12:33             ` Wu, Fei
2024-03-12 12:52               ` Daniel Henrique Barboza
2024-03-04 11:02 ` [RISC-V][tech-server-platform] [RFC 0/2] Add RISC-V Server Platform Reference Board Heinrich Schuchardt
2024-03-04 11:42   ` Chai, Evan
2024-03-07 22:15 ` Marcin Juszkiewicz
2024-03-12  8:59   ` Wu, Fei

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