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[88.28.3.83]) by smtp.gmail.com with ESMTPSA id w18-20020a05600c475200b0040d2d33312csm1229961wmo.2.2024.01.11.01.39.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 11 Jan 2024 01:39:23 -0800 (PST) Message-ID: Date: Thu, 11 Jan 2024 10:39:18 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 13/14] hw/arm: Prefer arm_feature(AARCH64) over object_property_find(aarch64) Content-Language: en-US To: qemu-devel@nongnu.org, Peter Maydell , Andrew Jones Cc: Marcin Juszkiewicz , qemu-arm@nongnu.org, Kevin Wolf , Igor Mitsyanko , =?UTF-8?Q?Alex_Benn=C3=A9e?= , Radoslaw Biernacki , "Edgar E. Iglesias" , Leif Lindholm , Rob Herring , Markus Armbruster , Alistair Francis , Marc Zyngier References: <20240110195329.3995-1-philmd@linaro.org> <20240110195329.3995-14-philmd@linaro.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: <20240110195329.3995-14-philmd@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 10/1/24 20:53, Philippe Mathieu-Daudé wrote: > The "aarch64" property is added to ARMCPU when the > ARM_FEATURE_AARCH64 feature is available. Rather than > checking whether the QOM property is present, directly > check the feature. > > Suggested-by: Markus Armbruster > Signed-off-by: Philippe Mathieu-Daudé > --- > hw/arm/virt.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/hw/arm/virt.c b/hw/arm/virt.c > index 49ed5309ff..a43e87874c 100644 > --- a/hw/arm/virt.c > +++ b/hw/arm/virt.c > @@ -2140,7 +2140,7 @@ static void machvirt_init(MachineState *machine) > numa_cpu_pre_plug(&possible_cpus->cpus[cs->cpu_index], DEVICE(cpuobj), > &error_fatal); > > - aarch64 &= object_property_get_bool(cpuobj, "aarch64", NULL); > + aarch64 &= arm_feature(cpu_env(cs), ARM_FEATURE_AARCH64); So after this patch there are no more use of the ARMCPU "aarch64" property from code. Still it is exposed via the qom-tree. Thus it can be set (see aarch64_cpu_set_aarch64). I could understand one flip this feature to create a custom CPU (as a big-LITTLE setup as Marc mentioned on IRC), but I don't understand what is the expected behavior when this is flipped at runtime. Can that happen in real hardware (how could the guest react to that...)? Thanks, Phil.