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([2607:fb91:1eea:522e:cd6b:212d:2658:903e]) by smtp.gmail.com with ESMTPSA id c12-20020aa78e0c000000b006933866fd21sm12057450pfr.117.2023.10.12.09.06.09 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 12 Oct 2023 09:06:10 -0700 (PDT) Message-ID: Date: Thu, 12 Oct 2023 09:06:07 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/6] target/riscv: Use env_archcpu() in [check_]nanbox() Content-Language: en-US To: LIU Zhiwei , =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org References: <20231009110239.66778-1-philmd@linaro.org> <20231009110239.66778-3-philmd@linaro.org> <8e8b6cef-efbf-42ac-975c-b523dc24a531@linux.alibaba.com> <58838379-60bf-4af4-980b-cff8ee49bfc2@linaro.org> <4a7e39f4-4302-4dfd-9112-4deea5c7403f@linux.alibaba.com> <3b745e06-d037-f1b7-0fec-373959598a15@linaro.org> From: Richard Henderson In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::231; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x231.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 10/11/23 22:59, LIU Zhiwei wrote: > > On 2023/10/11 13:31, Philippe Mathieu-Daudé wrote: >> On 11/10/23 05:25, LIU Zhiwei wrote: >>> >>> On 2023/10/11 1:04, Richard Henderson wrote: >>>> On 10/9/23 05:42, LIU Zhiwei wrote: >>>>> >>>>> On 2023/10/9 19:02, Philippe Mathieu-Daudé wrote: >>>>>> When CPUArchState* is available (here CPURISCVState*), we >>>>>> can use the fast env_archcpu() macro to get ArchCPU* (here >>>>>> RISCVCPU*). The QOM cast RISCV_CPU() macro will be slower >>>>>> when building with --enable-qom-cast-debug. >> >> >>>>> If so, maybe we have to do this qom cast somewhere. >>>> >>>> No, I don't think so.  Or at least not in these places. >>> >>> Yes.  Perhaps, we should remove all RISCV_CPU macros using after the qom objects realized. >>> >>> Do you think we should remove the RISCV_CPU using in riscv_cpu_exec_interrupt? Although >>> it  is not so hot. I think there is no reason to use it there. >> >> I have some note in my TODO to check replacing CPUState by ArchCPU in >> TCGCPUOps (like the cpu_exec_interrupt handler you mentioned). > > IMHO, this will make it harder for heterogeneous SOC support. ArchCPU is not a target > agnostic struct. ArchCPU is a target-agnostic typedef of a structure with no visible definition. C is perfectly happy to manipulate pointers to such structures. Whether it is worthwhile to adjust interfaces from CPUState to ArchCPU, I don't know. r~