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[83.50.226.26]) by smtp.gmail.com with ESMTPSA id c6-20020adffb46000000b0020c5253d90asm1782496wrs.86.2022.06.01.07.21.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 01 Jun 2022 07:21:37 -0700 (PDT) Message-ID: Date: Wed, 1 Jun 2022 16:21:36 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:91.0) Gecko/20100101 Thunderbird/91.9.1 Subject: Re: [PATCH] target/ppc: fix vbpermd in big endian hosts Content-Language: en-US To: matheus.ferst@eldorado.org.br, qemu-devel@nongnu.org, qemu-ppc@nongnu.org Cc: clg@kaod.org, danielhb413@gmail.com, david@gibson.dropbear.id.au, groug@kaod.org, richard.henderson@linaro.org, Mark Cave-Ayland References: <20220601125355.1266165-1-matheus.ferst@eldorado.org.br> In-Reply-To: <20220601125355.1266165-1-matheus.ferst@eldorado.org.br> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x436.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.249, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Reply-to: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= via +Mark for commit ef96e3ae96. On 1/6/22 14:53, matheus.ferst@eldorado.org.br wrote: > From: Matheus Ferst > > The extract64 arguments are not endian dependent as they are only used > for bitwise operations. The current behavior in little-endian hosts is > correct; since the indexes in VRB are in PowerISA-ordering, we should > always invert the value before calling extract64. Also, using the VsrD > macro, we can have a single EXTRACT_BIT definition for big and > little-endian with the correct behavior. > > Signed-off-by: Matheus Ferst > --- > Found this bug while refactoring VECTOR_FOR_INORDER_I uses. The > complete patch series will also use Vsr[DB] instead of VBPERM[DQ]_INDEX, > but it will need more testing. For now, we're just changing what is > necessary to fix the instruction. > --- > target/ppc/int_helper.c | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) > > diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c > index 105b626d1b..4c5d3f03f8 100644 > --- a/target/ppc/int_helper.c > +++ b/target/ppc/int_helper.c > @@ -1307,14 +1307,13 @@ XXGENPCV(XXGENPCVDM, 8) > #define VBPERMQ_INDEX(avr, i) ((avr)->u8[(i)]) > #define VBPERMD_INDEX(i) (i) > #define VBPERMQ_DW(index) (((index) & 0x40) != 0) > -#define EXTRACT_BIT(avr, i, index) (extract64((avr)->u64[i], index, 1)) > #else > #define VBPERMQ_INDEX(avr, i) ((avr)->u8[15 - (i)]) > #define VBPERMD_INDEX(i) (1 - i) > #define VBPERMQ_DW(index) (((index) & 0x40) == 0) > -#define EXTRACT_BIT(avr, i, index) \ > - (extract64((avr)->u64[1 - i], 63 - index, 1)) > #endif > +#define EXTRACT_BIT(avr, i, index) \ > + (extract64((avr)->VsrD(i), 63 - index, 1)) > > void helper_vbpermd(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) > {