From: Jiajie Chen <c@jia.je>
To: qemu-devel@nongnu.org
Cc: richard.henderson@linaro.org, yijun@loongson.cn,
	shenjinyang@loongson.cn,  gaosong@loongson.cn, i.qemu@xen0n.name
Subject: Re: [PATCH v4 11/11] target/loongarch: Add loongarch32 cpu la132
Date: Tue, 8 Aug 2023 09:59:10 +0800	[thread overview]
Message-ID: <fff0890f-43d9-5734-9c06-c6e236dcebc4@jia.je> (raw)
In-Reply-To: <20230808015506.1705140-12-c@jia.je>
On 2023/8/8 09:54, Jiajie Chen wrote:
> Add la132 as a loongarch32 cpu type and allow virt machine to be used
> with la132 instead of la464.
>
> Refactor common init logic out as loongarch_cpu_initfn_common.
>
> Signed-off-by: Jiajie Chen <c@jia.je>
> ---
>   hw/loongarch/virt.c    |  5 ----
>   target/loongarch/cpu.c | 54 ++++++++++++++++++++++++++++++++----------
>   2 files changed, 41 insertions(+), 18 deletions(-)
>
> diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
> index e19b042ce8..af15bf5aaa 100644
> --- a/hw/loongarch/virt.c
> +++ b/hw/loongarch/virt.c
> @@ -798,11 +798,6 @@ static void loongarch_init(MachineState *machine)
>           cpu_model = LOONGARCH_CPU_TYPE_NAME("la464");
>       }
>   
> -    if (!strstr(cpu_model, "la464")) {
> -        error_report("LoongArch/TCG needs cpu type la464");
> -        exit(1);
> -    }
> -
>       if (ram_size < 1 * GiB) {
>           error_report("ram_size must be greater than 1G.");
>           exit(1);
> diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
> index 13d4fccbd3..341176817e 100644
> --- a/target/loongarch/cpu.c
> +++ b/target/loongarch/cpu.c
> @@ -356,30 +356,18 @@ static bool loongarch_cpu_has_work(CPUState *cs)
>   #endif
>   }
>   
> -static void loongarch_la464_initfn(Object *obj)
> +static void loongarch_cpu_initfn_common(CPULoongArchState *env)
>   {
> -    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
> -    CPULoongArchState *env = &cpu->env;
>       int i;
>   
>       for (i = 0; i < 21; i++) {
>           env->cpucfg[i] = 0x0;
>       }
>   
> -    cpu->dtb_compatible = "loongarch,Loongson-3A5000";
> -    env->cpucfg[0] = 0x14c010;  /* PRID */
> -
>       uint32_t data = 0;
> -    data = FIELD_DP32(data, CPUCFG1, ARCH, 2);
>       data = FIELD_DP32(data, CPUCFG1, PGMMU, 1);
>       data = FIELD_DP32(data, CPUCFG1, IOCSR, 1);
> -    data = FIELD_DP32(data, CPUCFG1, PALEN, 0x2f);
> -    data = FIELD_DP32(data, CPUCFG1, VALEN, 0x2f);
>       data = FIELD_DP32(data, CPUCFG1, UAL, 1);
> -    data = FIELD_DP32(data, CPUCFG1, RI, 1);
> -    data = FIELD_DP32(data, CPUCFG1, EP, 1);
> -    data = FIELD_DP32(data, CPUCFG1, RPLV, 1);
> -    data = FIELD_DP32(data, CPUCFG1, HP, 1);
Sorry, this line should not be removed.
>       data = FIELD_DP32(data, CPUCFG1, IOCSR_BRD, 1);
>       env->cpucfg[1] = data;
>   
> @@ -439,6 +427,45 @@ static void loongarch_la464_initfn(Object *obj)
>       env->CSR_ASID = FIELD_DP64(0, CSR_ASID, ASIDBITS, 0xa);
>   }
>   
> +static void loongarch_la464_initfn(Object *obj)
> +{
> +    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
> +    CPULoongArchState *env = &cpu->env;
> +
> +    loongarch_cpu_initfn_common(env);
> +
> +    cpu->dtb_compatible = "loongarch,Loongson-3A5000";
> +    env->cpucfg[0] = 0x14c010;  /* PRID */
> +
> +    uint32_t data = env->cpucfg[1];
> +    data = FIELD_DP32(data, CPUCFG1, ARCH, 2); /* LA64 */
> +    data = FIELD_DP32(data, CPUCFG1, PALEN, 0x2f); /* 48 bits */
> +    data = FIELD_DP32(data, CPUCFG1, VALEN, 0x2f); /* 48 bits */
> +    data = FIELD_DP32(data, CPUCFG1, RI, 1);
> +    data = FIELD_DP32(data, CPUCFG1, EP, 1);
> +    data = FIELD_DP32(data, CPUCFG1, RPLV, 1);
> +    env->cpucfg[1] = data;
> +}
> +
> +static void loongarch_la132_initfn(Object *obj)
> +{
> +    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
> +    CPULoongArchState *env = &cpu->env;
> +
> +    loongarch_cpu_initfn_common(env);
> +
> +    cpu->dtb_compatible = "loongarch,Loongson-1C103";
> +
> +    uint32_t data = env->cpucfg[1];
> +    data = FIELD_DP32(data, CPUCFG1, ARCH, 1); /* LA32 */
> +    data = FIELD_DP32(data, CPUCFG1, PALEN, 0x1f); /* 32 bits */
> +    data = FIELD_DP32(data, CPUCFG1, VALEN, 0x1f); /* 32 bits */
> +    data = FIELD_DP32(data, CPUCFG1, RI, 0);
> +    data = FIELD_DP32(data, CPUCFG1, EP, 0);
> +    data = FIELD_DP32(data, CPUCFG1, RPLV, 0);
> +    env->cpucfg[1] = data;
> +}
> +
>   static void loongarch_cpu_list_entry(gpointer data, gpointer user_data)
>   {
>       const char *typename = object_class_get_name(OBJECT_CLASS(data));
> @@ -784,5 +811,6 @@ static const TypeInfo loongarch32_cpu_type_infos[] = {
>           .class_size = sizeof(LoongArchCPUClass),
>           .class_init = loongarch32_cpu_class_init,
>       },
> +    DEFINE_LOONGARCH32_CPU_TYPE("la132", loongarch_la132_initfn),
>   };
>   DEFINE_TYPES(loongarch32_cpu_type_infos)
next prev parent reply	other threads:[~2023-08-08  1:59 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-08  1:54 [PATCH v4 00/11] Add la32 & va32 mode for loongarch64-softmmu Jiajie Chen
2023-08-08  1:54 ` [PATCH v4 01/11] target/loongarch: Add macro to check current arch Jiajie Chen
2023-08-08 17:01   ` Richard Henderson
2023-08-08 17:13     ` Jiajie Chen
2023-08-10 11:08       ` Philippe Mathieu-Daudé
2023-08-10 11:06   ` Philippe Mathieu-Daudé
2023-08-08  1:54 ` [PATCH v4 02/11] target/loongarch: Add new object class for loongarch32 cpus Jiajie Chen
2023-08-08 18:19   ` Richard Henderson
2023-08-08  1:54 ` [PATCH v4 03/11] target/loongarch: Add GDB support for loongarch32 mode Jiajie Chen
2023-08-08 18:34   ` Richard Henderson
2023-08-08  1:54 ` [PATCH v4 04/11] target/loongarch: Support LoongArch32 TLB entry Jiajie Chen
2023-08-08 18:37   ` Richard Henderson
2023-08-08  1:54 ` [PATCH v4 05/11] target/loongarch: Support LoongArch32 DMW Jiajie Chen
2023-08-08 18:37   ` Richard Henderson
2023-08-08  1:54 ` [PATCH v4 06/11] target/loongarch: Support LoongArch32 VPPN Jiajie Chen
2023-08-08 18:38   ` Richard Henderson
2023-08-08  1:54 ` [PATCH v4 07/11] target/loongarch: Add LA32 & VA32 to DisasContext Jiajie Chen
2023-08-08 18:40   ` Richard Henderson
2023-08-08  1:54 ` [PATCH v4 08/11] target/loongarch: Reject la64-only instructions in la32 mode Jiajie Chen
2023-08-08 18:48   ` Richard Henderson
2023-08-08  1:54 ` [PATCH v4 09/11] target/loongarch: Truncate high 32 bits of address in VA32 mode Jiajie Chen
2023-08-08 19:08   ` Richard Henderson
2023-08-08  1:54 ` [PATCH v4 10/11] target/loongarch: Sign extend results " Jiajie Chen
2023-08-08 19:12   ` Richard Henderson
2023-08-08  1:54 ` [PATCH v4 11/11] target/loongarch: Add loongarch32 cpu la132 Jiajie Chen
2023-08-08  1:59   ` Jiajie Chen [this message]
2023-08-08 19:26   ` Richard Henderson
2023-08-09  7:31     ` Jiajie Chen
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