From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1O91s6-0006NN-H5 for qemu-devel@nongnu.org; Mon, 03 May 2010 16:04:06 -0400 Received: from [140.186.70.92] (port=44162 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1O91s1-0006Lv-08 for qemu-devel@nongnu.org; Mon, 03 May 2010 16:04:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1O91ry-00041m-Je for qemu-devel@nongnu.org; Mon, 03 May 2010 16:04:00 -0400 Received: from mail-fx0-f45.google.com ([209.85.161.45]:60379) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1O91rx-00041Z-U7 for qemu-devel@nongnu.org; Mon, 03 May 2010 16:03:58 -0400 Received: by fxm12 with SMTP id 12so2518375fxm.4 for ; Mon, 03 May 2010 13:03:56 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: References: Date: Tue, 4 May 2010 00:03:56 +0400 Message-ID: From: Igor Kovalenko Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] Re: sparc64 lazy conditional codes evaluation List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Blue Swirl Cc: qemu-devel On Mon, May 3, 2010 at 11:54 PM, Blue Swirl wrote: > On 5/3/10, Igor Kovalenko wrote: >> On Mon, May 3, 2010 at 11:24 PM, Blue Swirl wrote= : >> =A0> On 5/3/10, Igor Kovalenko wrote: >> =A0>> Hi! >> =A0>> >> =A0>> =A0There is an issue with lazy conditional codes evaluation where >> =A0>> =A0we return from trap handler with mismatching conditionals. >> =A0>> >> =A0>> =A0I seldom reproduce it here when dragging qemu window while >> =A0>> =A0machine is working through silo initialization. I use gentoo mi= nimal cd >> =A0>> =A0install-sparc64-minimal-20100322.iso but I think anything with = silo boot >> =A0>> =A0would experience the same. Once in a while it would report crc = error, >> =A0>> =A0unable to open cd partition or it would fail to decompress imag= e. >> =A0> >> =A0> I think I've also seen this. >> =A0> >> =A0>> =A0Pattern that fails appears to require a sequence of compare ins= n >> =A0>> =A0possibly followed by a few instructions which do not touch cond= itionals, >> =A0>> =A0then conditional branch insn. If it happens that we trap while = processing >> =A0>> =A0conditional branch insn so it is restarted after return from tr= ap then >> =A0>> =A0seldom conditional codes are calculated incorrectly. >> =A0>> >> =A0>> =A0I cannot point to exact cause but it appears that after trap re= turn >> =A0>> =A0we may have CC_OP and CC_SRC* mismatch somewhere, >> =A0>> =A0since adding more cond evaluation flushes over the code helps. >> =A0>> >> =A0>> =A0We already tried doing flush more frequently and it is still no= t >> =A0>> =A0complete, so the question is how to finally do this once and ri= ght :) >> =A0>> >> =A0>> =A0Obviously I do not get the design of lazy evaluation right, but >> =A0>> =A0the following list appears to be good start. Plan is to prepare >> =A0>> =A0a change to qemu and find a way to test it. >> =A0>> >> =A0>> =A01. Since SPARC* is a RISC CPU it seems to be not profitable to >> =A0>> =A0 =A0use DisasContext->cc_op to predict if flags should be not e= valuated >> =A0>> =A0 =A0due to overriding insn. Instead we can drop cc_op from disa= ssembler >> =A0>> =A0 =A0context and simplify code to only use cc_op from env. >> =A0> >> =A0> Not currently, but in the future we may use that to do even lazier >> =A0> flags computation. For example the sequence 'cmp x, y; bne target' >> =A0> could be much more optimal by changing the branch to do the >> =A0> comparison. Here's an old unfinished patch to do some of this. >> =A0> >> =A0>> =A0 =A0Another point is that we always write to env->cc_op when >> =A0>> =A0translating *cc insns >> =A0>> =A0 =A0This should solve any issue with dc->cc_op prediction going >> =A0>> =A0 =A0out of sync with env->cc_op and cpu_cc_src* >> =A0> >> =A0> I think this is what is happening now. >> =A0> >> =A0>> =A02. We must flush lazy evaluation back to CC_OP_FLAGS in a few c= ases when >> =A0>> =A0 =A0a. conditional code is required by insn (like addc, cond br= anch etc.) >> =A0>> =A0 =A0 =A0 - here we can optimize by evaluating specific bits (ca= rry?) >> =A0>> =A0 =A0 =A0 - not sure if it works in case we have two cond consum= ing insns, >> =A0>> =A0 =A0 =A0 =A0 where first needs carry another needs the rest of = flags >> =A0> >> =A0> Here's another patch to optimize C flag handling. It doesn't pass m= y >> =A0> tests though. >> =A0> >> =A0>> =A0 =A0b. CCR is read by rdccr (helper_rdccr) >> =A0>> =A0 =A0 =A0 - have to compute all flags >> =A0>> =A0 =A0c. trap occurs and we prepare trap level context (saving ps= tate) >> =A0>> =A0 =A0 =A0 - have to compute all flags >> =A0>> =A0 =A0d. control goes out of tcg runtime (so gdbstub reads correc= t value from env) >> =A0>> =A0 =A0 =A0 - have to compute all flags >> =A0> >> =A0> Fully agree. >> >> >> Cool >> >> =A0Still I'd propose to kill dc->cc_op, find a reliable way to test it >> =A0and then add it back possibly with more optimizations. >> =A0I'm lost in the code up to the point where I believe we need to >> =A0save/restore cc_op and cpu_cc* while switching trap levels. > > I'd think this should do the trick: > > diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c > index b27778b..94921cd 100644 > --- a/target-sparc/op_helper.c > +++ b/target-sparc/op_helper.c > @@ -3506,6 +3506,8 @@ void do_interrupt(CPUState *env) > =A0 =A0 } > =A0 =A0 tsptr =3D cpu_tsptr(env); > > + =A0 =A0helper_compute_psr(); > + > =A0 =A0 tsptr->tstate =3D ((uint64_t)GET_CCR(env) << 32) | > =A0 =A0 =A0 =A0 ((env->asi & 0xff) << 24) | ((env->pstate & 0xf3f) << 8) = | > =A0 =A0 =A0 =A0 GET_CWP64(env); > Thanks, this change seems to work here for silo issue. Another change would be to flush for gdbstub use of GET_CCR and for helper_rdccr. I tried to embed flush into GET_CCR but the code looks ugly since we need to proxy a call to helper_compute_psr from gdbstub passing available env pointer. Not really tested with your changes, but still what is the breakage you see= ? --=20 Kind regards, Igor V. Kovalenko