From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1O52GB-0003wK-89 for qemu-devel@nongnu.org; Thu, 22 Apr 2010 15:40:27 -0400 Received: from [140.186.70.92] (port=43337 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1O52G9-0003ub-9r for qemu-devel@nongnu.org; Thu, 22 Apr 2010 15:40:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1O52Fr-0000AL-L6 for qemu-devel@nongnu.org; Thu, 22 Apr 2010 15:40:13 -0400 Received: from mail-pv0-f173.google.com ([74.125.83.173]:49468) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1O52Fr-00009y-FT for qemu-devel@nongnu.org; Thu, 22 Apr 2010 15:40:07 -0400 Received: by pvg2 with SMTP id 2so309844pvg.4 for ; Thu, 22 Apr 2010 12:40:05 -0700 (PDT) MIME-Version: 1.0 Sender: slightlyunconventional@gmail.com In-Reply-To: <4BCEF15B.7020204@suse.de> References: <1271841716-11582-1-git-send-email-thomas_ml@monjalon.net> <1271841716-11582-3-git-send-email-thomas_ml@monjalon.net> <9658034F-3621-4F6B-BBD7-CFDAF7E8BCDB@suse.de> <201004211407.50369.thomas_ml@monjalon.net> <4BCEF15B.7020204@suse.de> Date: Thu, 22 Apr 2010 12:40:05 -0700 Message-ID: Subject: Re: [Qemu-devel] [PATCH 2/2] target-ppc: fix interrupt vectors for MPC603 and e300 From: Hollis Blanchard Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexander Graf Cc: qemu-devel@nongnu.org, segher@kernel.crashing.org On Wed, Apr 21, 2010 at 5:36 AM, Alexander Graf wrote: > Thomas Monjalon wrote: >> Alexander Graf wrote: >> >>>> --- a/target-ppc/translate_init.c >>>> +++ b/target-ppc/translate_init.c >>>> @@ -2853,7 +2853,16 @@ static void init_excp_603 (CPUPPCState *env) >>>> =A0 =A0 env->excp_vectors[POWERPC_EXCP_SMI] =A0 =A0 =A0=3D 0x00001400; >>>> =A0 =A0 env->hreset_excp_prefix =3D 0x00000000UL; >>>> =A0 =A0 /* Hardware reset vector */ >>>> - =A0 =A0env->hreset_vector =3D 0xFFFFFFFCUL; >>>> + =A0 =A0env->hreset_vector =3D 0x00000100UL; >>>> >>> Are you 100% sure this is correct? IIRC the reset vector is dictated by= the >>> CPU initialization sequence, so there's no hardwired value here really. >>> >> >> It is explained in [e300CORERM] at chapters 5.2.3, 5.5.1.1 and 8.3.3. >> Clearly, the vector offset is 0x100 and the exception prefix can be 0 or >> 0xFFF00000, depending of the MSR[IP] bit. >> >> So, yes, I'm sure the value of hreset_vector must be 0x100. >> But hreset_excp_prefix can change. It could be another patch. >> > > Interesting. That's different from 970. Only Book E processors come out of reset with a PC of 0xfffffffc. "Classic" PowerPC comes out with PC 0xfff00100 (the FFF part specified by MSR[IP]). 970 may be a bad example in that it can't actually bring itself up -- it requires an external controller to configure it at power-up. So whatever the external controller programs into the PC is where it starts. I don't see any mention of an initial PC value in the 970 user manuals. Qemu ignores these details and pretends that all PowerPC start at 0xffffffc. As long as you have qemu-specific firmware that expects this behavior, you're ok... -Hollis