[Qemu-devel] Re: sparc32 FPU SP Invalid CEXC Test

[Blue Swirl <blauwirbel@gmail.com>]

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On 4/15/10, Artyom Tarasenko <atar4qemu@googlemail.com> wrote:
> 2010/4/15 Artyom Tarasenko <atar4qemu@googlemail.com>:
>
> > One of LX's tests crashes pretty hard, causing qemu abort.
>  > I've tried to look how does the execution flow works with -d in_asm.
>  > Does the address in the log show the guest's PC register?
>
>
> It's probably sort of a "timing" issue.
>
>  Can we check exceptions not just on jumps, but also on floating poit
>  operations which may cause a trap?
>  These traps are supposed to be syncronous.

Yes, the bug is that PC and NPC are not saved before executing FPU
instructions. Please try this patch.

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From 6c7d08b06214337f2b95d865b33c7ca188899fa4 Mon Sep 17 00:00:00 2001
From: Blue Swirl <blauwirbel@gmail.com>
Date: Thu, 15 Apr 2010 17:14:28 +0000
Subject: [PATCH] Sparc: fix PC/NPC during FPU traps

All FPU instructions can trap, so save PC/NPC state before
executing them.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
---
 target-sparc/translate.c |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 2c07385..addb1e1 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -2155,6 +2155,7 @@ static void disas_sparc_insn(DisasContext * dc)
                 rs1 = GET_FIELD(insn, 13, 17);
                 rs2 = GET_FIELD(insn, 27, 31);
                 xop = GET_FIELD(insn, 18, 26);
+                save_state(dc, cpu_cond);
                 switch (xop) {
                 case 0x1: /* fmovs */
                     tcg_gen_mov_i32(cpu_fpr[rd], cpu_fpr[rs2]);
@@ -2468,6 +2469,7 @@ static void disas_sparc_insn(DisasContext * dc)
                 rs1 = GET_FIELD(insn, 13, 17);
                 rs2 = GET_FIELD(insn, 27, 31);
                 xop = GET_FIELD(insn, 18, 26);
+                save_state(dc, cpu_cond);
 #ifdef TARGET_SPARC64
                 if ((xop & 0x11f) == 0x005) { // V9 fmovsr
                     int l1;
-- 
1.5.6.5