From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:34847) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RAyVX-0005jW-Dz for qemu-devel@nongnu.org; Tue, 04 Oct 2011 02:29:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RAyVW-0004NV-CW for qemu-devel@nongnu.org; Tue, 04 Oct 2011 02:29:39 -0400 Received: from lo.gmane.org ([80.91.229.12]:56188) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RAyVW-0004NP-7N for qemu-devel@nongnu.org; Tue, 04 Oct 2011 02:29:38 -0400 Received: from list by lo.gmane.org with local (Exim 4.69) (envelope-from ) id 1RAyVT-0008Dz-BW for qemu-devel@nongnu.org; Tue, 04 Oct 2011 08:29:35 +0200 Received: from 93-34-218-143.ip51.fastwebnet.it ([93.34.218.143]) by main.gmane.org with esmtp (Gmexim 0.1 (Debian)) id 1AlnuQ-0007hv-00 for ; Tue, 04 Oct 2011 08:29:35 +0200 Received: from pbonzini by 93-34-218-143.ip51.fastwebnet.it with local (Gmexim 0.1 (Debian)) id 1AlnuQ-0007hv-00 for ; Tue, 04 Oct 2011 08:29:35 +0200 From: Paolo Bonzini Date: Tue, 04 Oct 2011 08:29:21 +0200 Message-ID: References: <1317674600-19083-1-git-send-email-sw@weilnetz.de> <1317674600-19083-3-git-send-email-sw@weilnetz.de> <4E8A208E.3050201@freescale.com> <4E8A24BC.1020506@weilnetz.de> <4E8A2BCE.2050809@freescale.com> <4E8A9FCA.5080801@weilnetz.de> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit In-Reply-To: <4E8A9FCA.5080801@weilnetz.de> Subject: Re: [Qemu-devel] [Qemu-ppc] [PATCH 2/2] tcg/ppc*: Move cache initialization to ppc specific code List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org On 10/04/2011 07:55 AM, Stefan Weil wrote: > I learned now that ppc will need flush_icache_range() for kvm, too. > So it won't be possible to implement a uniform handling of > flush_icache_range() for all host architectures. x86 and IIRC s390 flush_icache_range is a no-op, so it is possible to "call" it for all KVM architectures without incurring penalties. Paolo