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From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 08/10] fdc: add CCR (Configuration Control Register) write register
Date: Mon, 09 Jan 2012 09:09:13 +0100	[thread overview]
Message-ID: <jee7b9$1tq$1@dough.gmane.org> (raw)
In-Reply-To: <1326054468-5361-9-git-send-email-hpoussin@reactos.org>

On 01/08/2012 09:27 PM, Hervé Poussineau wrote:
>
> Signed-off-by: Hervé Poussineau<hpoussin@reactos.org>
> ---
>   hw/fdc.c |   21 +++++++++++++++++++++
>   1 files changed, 21 insertions(+), 0 deletions(-)
>
> diff --git a/hw/fdc.c b/hw/fdc.c
> index ddfa91f..67cd14f 100644
> --- a/hw/fdc.c
> +++ b/hw/fdc.c
> @@ -227,6 +227,7 @@ static void fdctrl_write_rate(FDCtrl *fdctrl, uint32_t value);
>   static uint32_t fdctrl_read_data(FDCtrl *fdctrl);
>   static void fdctrl_write_data(FDCtrl *fdctrl, uint32_t value);
>   static uint32_t fdctrl_read_dir(FDCtrl *fdctrl);
> +static void fdctrl_write_ccr(FDCtrl *fdctrl, uint32_t value);
>
>   enum {
>       FD_DIR_WRITE   = 0,
> @@ -251,6 +252,7 @@ enum {
>       FD_REG_DSR = 0x04,
>       FD_REG_FIFO = 0x05,
>       FD_REG_DIR = 0x07,
> +    FD_REG_CCR = 0x07,
>   };
>
>   enum {
> @@ -495,6 +497,8 @@ static void fdctrl_write (void *opaque, uint32_t reg, uint32_t value)
>       case FD_REG_FIFO:
>           fdctrl_write_data(fdctrl, value);
>           break;
> +    case FD_REG_CCR:
> +        fdctrl_write_ccr(fdctrl, value);
>       default:
>           break;
>       }
> @@ -885,6 +889,23 @@ static void fdctrl_write_rate(FDCtrl *fdctrl, uint32_t value)
>       fdctrl->dsr = value;
>   }
>
> +/* Configuration control register: 0x07 (write) */
> +static void fdctrl_write_ccr(FDCtrl *fdctrl, uint32_t value)
> +{
> +    /* Reset mode */
> +    if (!(fdctrl->dor&  FD_DOR_nRESET)) {
> +        FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
> +        return;
> +    }
> +    FLOPPY_DPRINTF("configuration control register set to 0x%02x\n", value);
> +
> +    /* Only the rate selection bits used in AT mode, and we
> +     * store those in the DSR.
> +     */
> +    fdctrl->dsr = (fdctrl->dsr&  ~FD_DSR_DRATEMASK) |
> +                  (value&  FD_DSR_DRATEMASK);
> +}
> +
>   static int fdctrl_media_changed(FDrive *drv)
>   {
>       int ret;

This should go before patch 7, shouldn't it?

Paolo

  reply	other threads:[~2012-01-09  8:09 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-01-08 20:27 [Qemu-devel] [PATCH 00/10] Misc fixes for floppy emulation Hervé Poussineau
2012-01-08 20:27 ` [Qemu-devel] [PATCH 01/10] fdc: take head count into account Hervé Poussineau
2012-01-08 20:27 ` [Qemu-devel] [PATCH 02/10] fdc: set busy bit when starting a command Hervé Poussineau
2012-01-08 20:27 ` [Qemu-devel] [PATCH 03/10] fdc: most control commands do not generate interrupts Hervé Poussineau
2012-01-08 20:27 ` [Qemu-devel] [PATCH 04/10] fdc: emulate stepping 0 Hervé Poussineau
2012-01-08 20:27 ` [Qemu-devel] [PATCH 05/10] fdc: handle read-only floppies (abort early on write commands) Hervé Poussineau
2012-01-08 20:27 ` [Qemu-devel] [PATCH 06/10] block: add a transfer rate for floppy types Hervé Poussineau
2012-01-08 20:27 ` [Qemu-devel] [PATCH 07/10] fdc: check if media rate is correct before doing any transfer Hervé Poussineau
2012-01-11 20:51   ` Andreas Färber
2012-01-08 20:27 ` [Qemu-devel] [PATCH 08/10] fdc: add CCR (Configuration Control Register) write register Hervé Poussineau
2012-01-09  8:09   ` Paolo Bonzini [this message]
2012-01-11 20:30   ` Andreas Färber
2012-01-08 20:27 ` [Qemu-devel] [PATCH 09/10] fdc: fix seek command, which shouldn't check tracks Hervé Poussineau
2012-01-08 20:27 ` [Qemu-devel] [PATCH 10/10] fdc: DIR (Digital Input Register) should return status of current drive Hervé Poussineau
2012-01-11 20:48   ` Andreas Färber
  -- strict thread matches above, loose matches on Subject: below --
2012-01-10 22:09 [Qemu-devel] [PATCH 08/10] fdc: add CCR (Configuration Control Register) write register Hervé Poussineau

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