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* [Qemu-devel] [PATCH arm] Fix bit test in Exynos4210 UART emulation to use & instead of &&
@ 2012-04-02 13:43 Daniel P. Berrange
  2012-04-02 13:47 ` Peter Maydell
  2012-04-02 16:04 ` Maksim Kozlov
  0 siblings, 2 replies; 3+ messages in thread
From: Daniel P. Berrange @ 2012-04-02 13:43 UTC (permalink / raw)
  To: qemu-devel; +Cc: Peter Maydell

From: "Daniel P. Berrange" <berrange@redhat.com>

* hw/exynos4210_uart.c: s/&&/&/

Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
---
 hw/exynos4210_uart.c |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/hw/exynos4210_uart.c b/hw/exynos4210_uart.c
index 73a9c18..ccc4780 100644
--- a/hw/exynos4210_uart.c
+++ b/hw/exynos4210_uart.c
@@ -246,7 +246,7 @@ static uint32_t exynos4210_uart_Tx_FIFO_trigger_level(Exynos4210UartState *s)
     uint32_t level = 0;
     uint32_t reg;
 
-    reg = (s->reg[I_(UFCON)] && UFCON_Tx_FIFO_TRIGGER_LEVEL) >>
+    reg = (s->reg[I_(UFCON)] & UFCON_Tx_FIFO_TRIGGER_LEVEL) >>
             UFCON_Tx_FIFO_TRIGGER_LEVEL_SHIFT;
 
     switch (s->channel) {
@@ -275,9 +275,9 @@ static void exynos4210_uart_update_irq(Exynos4210UartState *s)
      * The Tx interrupt is always requested if the number of data in the
      * transmit FIFO is smaller than the trigger level.
      */
-    if (s->reg[I_(UFCON)] && UFCON_FIFO_ENABLE) {
+    if (s->reg[I_(UFCON)] & UFCON_FIFO_ENABLE) {
 
-        uint32_t count = (s->reg[I_(UFSTAT)] && UFSTAT_Tx_FIFO_COUNT) >>
+        uint32_t count = (s->reg[I_(UFSTAT)] & UFSTAT_Tx_FIFO_COUNT) >>
                 UFSTAT_Tx_FIFO_COUNT_SHIFT;
 
         if (count <= exynos4210_uart_Tx_FIFO_trigger_level(s)) {
-- 
1.7.7.6

^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [Qemu-devel] [PATCH arm] Fix bit test in Exynos4210 UART emulation to use & instead of &&
  2012-04-02 13:43 [Qemu-devel] [PATCH arm] Fix bit test in Exynos4210 UART emulation to use & instead of && Daniel P. Berrange
@ 2012-04-02 13:47 ` Peter Maydell
  2012-04-02 16:04 ` Maksim Kozlov
  1 sibling, 0 replies; 3+ messages in thread
From: Peter Maydell @ 2012-04-02 13:47 UTC (permalink / raw)
  To: Daniel P. Berrange; +Cc: qemu-devel

On 2 April 2012 14:43, Daniel P. Berrange <berrange@redhat.com> wrote:
> From: "Daniel P. Berrange" <berrange@redhat.com>
>
> * hw/exynos4210_uart.c: s/&&/&/
>
> Signed-off-by: Daniel P. Berrange <berrange@redhat.com>

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
and put into arm-devs.next. Thanks.

-- PMM

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [Qemu-devel] [PATCH arm] Fix bit test in Exynos4210 UART emulation to use & instead of &&
  2012-04-02 13:43 [Qemu-devel] [PATCH arm] Fix bit test in Exynos4210 UART emulation to use & instead of && Daniel P. Berrange
  2012-04-02 13:47 ` Peter Maydell
@ 2012-04-02 16:04 ` Maksim Kozlov
  1 sibling, 0 replies; 3+ messages in thread
From: Maksim Kozlov @ 2012-04-02 16:04 UTC (permalink / raw)
  To: qemu-devel

02.04.2012 17:43, Daniel P. Berrange пишет:
> From: "Daniel P. Berrange"<berrange@redhat.com>
>
> * hw/exynos4210_uart.c: s/&&/&/
>
> Signed-off-by: Daniel P. Berrange<berrange@redhat.com>
> ---
>   hw/exynos4210_uart.c |    6 +++---
>   1 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/hw/exynos4210_uart.c b/hw/exynos4210_uart.c
> index 73a9c18..ccc4780 100644
> --- a/hw/exynos4210_uart.c
> +++ b/hw/exynos4210_uart.c
> @@ -246,7 +246,7 @@ static uint32_t exynos4210_uart_Tx_FIFO_trigger_level(Exynos4210UartState *s)
>       uint32_t level = 0;
>       uint32_t reg;
>
> -    reg = (s->reg[I_(UFCON)]&&  UFCON_Tx_FIFO_TRIGGER_LEVEL)>>
> +    reg = (s->reg[I_(UFCON)]&  UFCON_Tx_FIFO_TRIGGER_LEVEL)>>
>               UFCON_Tx_FIFO_TRIGGER_LEVEL_SHIFT;
>
>       switch (s->channel) {
> @@ -275,9 +275,9 @@ static void exynos4210_uart_update_irq(Exynos4210UartState *s)
>        * The Tx interrupt is always requested if the number of data in the
>        * transmit FIFO is smaller than the trigger level.
>        */
> -    if (s->reg[I_(UFCON)]&&  UFCON_FIFO_ENABLE) {
> +    if (s->reg[I_(UFCON)]&  UFCON_FIFO_ENABLE) {
>
> -        uint32_t count = (s->reg[I_(UFSTAT)]&&  UFSTAT_Tx_FIFO_COUNT)>>
> +        uint32_t count = (s->reg[I_(UFSTAT)]&  UFSTAT_Tx_FIFO_COUNT)>>
>                   UFSTAT_Tx_FIFO_COUNT_SHIFT;
>
>           if (count<= exynos4210_uart_Tx_FIFO_trigger_level(s)) {
Thanks for fixing

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2012-04-02 16:05 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2012-04-02 13:43 [Qemu-devel] [PATCH arm] Fix bit test in Exynos4210 UART emulation to use & instead of && Daniel P. Berrange
2012-04-02 13:47 ` Peter Maydell
2012-04-02 16:04 ` Maksim Kozlov

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