From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:55308) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SEjkq-0003zJ-72 for qemu-devel@nongnu.org; Mon, 02 Apr 2012 12:05:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SEjkj-00019q-V1 for qemu-devel@nongnu.org; Mon, 02 Apr 2012 12:05:15 -0400 Received: from plane.gmane.org ([80.91.229.3]:56178) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SEjkj-00019a-P7 for qemu-devel@nongnu.org; Mon, 02 Apr 2012 12:05:09 -0400 Received: from list by plane.gmane.org with local (Exim 4.69) (envelope-from ) id 1SEjkd-0000qs-SR for qemu-devel@nongnu.org; Mon, 02 Apr 2012 18:05:03 +0200 Received: from 213.33.220.118 ([213.33.220.118]) by main.gmane.org with esmtp (Gmexim 0.1 (Debian)) id 1AlnuQ-0007hv-00 for ; Mon, 02 Apr 2012 18:05:03 +0200 Received: from m.kozlov by 213.33.220.118 with local (Gmexim 0.1 (Debian)) id 1AlnuQ-0007hv-00 for ; Mon, 02 Apr 2012 18:05:03 +0200 From: Maksim Kozlov Date: Mon, 02 Apr 2012 20:04:08 +0400 Message-ID: References: <1333374233-1238-1-git-send-email-berrange@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit In-Reply-To: <1333374233-1238-1-git-send-email-berrange@redhat.com> Subject: Re: [Qemu-devel] [PATCH arm] Fix bit test in Exynos4210 UART emulation to use & instead of && List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org 02.04.2012 17:43, Daniel P. Berrange пишет: > From: "Daniel P. Berrange" > > * hw/exynos4210_uart.c: s/&&/&/ > > Signed-off-by: Daniel P. Berrange > --- > hw/exynos4210_uart.c | 6 +++--- > 1 files changed, 3 insertions(+), 3 deletions(-) > > diff --git a/hw/exynos4210_uart.c b/hw/exynos4210_uart.c > index 73a9c18..ccc4780 100644 > --- a/hw/exynos4210_uart.c > +++ b/hw/exynos4210_uart.c > @@ -246,7 +246,7 @@ static uint32_t exynos4210_uart_Tx_FIFO_trigger_level(Exynos4210UartState *s) > uint32_t level = 0; > uint32_t reg; > > - reg = (s->reg[I_(UFCON)]&& UFCON_Tx_FIFO_TRIGGER_LEVEL)>> > + reg = (s->reg[I_(UFCON)]& UFCON_Tx_FIFO_TRIGGER_LEVEL)>> > UFCON_Tx_FIFO_TRIGGER_LEVEL_SHIFT; > > switch (s->channel) { > @@ -275,9 +275,9 @@ static void exynos4210_uart_update_irq(Exynos4210UartState *s) > * The Tx interrupt is always requested if the number of data in the > * transmit FIFO is smaller than the trigger level. > */ > - if (s->reg[I_(UFCON)]&& UFCON_FIFO_ENABLE) { > + if (s->reg[I_(UFCON)]& UFCON_FIFO_ENABLE) { > > - uint32_t count = (s->reg[I_(UFSTAT)]&& UFSTAT_Tx_FIFO_COUNT)>> > + uint32_t count = (s->reg[I_(UFSTAT)]& UFSTAT_Tx_FIFO_COUNT)>> > UFSTAT_Tx_FIFO_COUNT_SHIFT; > > if (count<= exynos4210_uart_Tx_FIFO_trigger_level(s)) { Thanks for fixing