From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57762) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YVk8k-0006Vt-Fy for qemu-devel@nongnu.org; Wed, 11 Mar 2015 13:09:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YVk8h-0000Vo-9b for qemu-devel@nongnu.org; Wed, 11 Mar 2015 13:09:50 -0400 Received: from mx1.redhat.com ([209.132.183.28]:43475) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YVk8h-0000Vc-1Z for qemu-devel@nongnu.org; Wed, 11 Mar 2015 13:09:47 -0400 From: Bandan Das References: <20150310165755.GL2338@work-vm> <54FF337A.1010202@redhat.com> <54FF4541.9080608@redhat.com> <20150310202958.GR2338@work-vm> <20150311134556.GH2334@work-vm> <20150311154220.GA26463@morn.localdomain> Date: Wed, 11 Mar 2015 13:09:42 -0400 In-Reply-To: <20150311154220.GA26463@morn.localdomain> (Kevin O'Connor's message of "Wed, 11 Mar 2015 11:42:20 -0400") Message-ID: MIME-Version: 1.0 Content-Type: text/plain Subject: Re: [Qemu-devel] E5-2620v2 - emulation stop error List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Kevin O'Connor Cc: Andrey Korolyov , "kvm@vger.kernel.org" , "qemu-devel@nongnu.org" , "Dr. David Alan Gilbert" , kraxel@redhat.com, Paolo Bonzini "Kevin O'Connor" writes: ... > > Something is very odd here. When I run the above command (on an older > AMD machine) I get: > > Found 128 cpu(s) max supported 128 cpu(s) > > That first value (1 vs 128) comes from QEMU (via cmos index 0x5f). > That is, during smp init, SeaBIOS expects QEMU to tell it how many > cpus are active, and SeaBIOS waits until that many CPUs check in from > its SIPI request before proceeding. > > I wonder if QEMU reported only 1 active cpu via that cmos register, > but more were actually active. If that was the case, it could I was daring enough to try this and I don't see the crash :) diff --git a/src/fw/smp.c b/src/fw/smp.c index a466ea6..a346d46 100644 --- a/src/fw/smp.c +++ b/src/fw/smp.c @@ -49,6 +49,7 @@ int apic_id_is_present(u8 apic_id) void VISIBLE32FLAT handle_smp(void) { + dprintf(DEBUG_HDL_smp, "Calling handle_smp\n"); if (!CONFIG_QEMU) return; @@ -128,6 +129,8 @@ smp_setup(void) // Wait for other CPUs to process the SIPI. u8 cmos_smp_count = rtc_read(CMOS_BIOS_SMP_COUNT) + 1; + while (cmos_smp_count == 1) + cmos_smp_count = rtc_read(CMOS_BIOS_SMP_COUNT) + 1; while (cmos_smp_count != CountCPUs) asm volatile( // Release lock and allow other processors to use the stack. So, the while loop results in a race somehow ? Bandan > certainly explain the failure - as multiple cpus could be running > without the sipi trapoline in place. > > What does the log look like on a non-failure case? > > -Kevin